CT1611 Datasheet, PDF (21/24 Pages) Aeroflex Circuit Technology – DMA Controller with Buffer Memory,MIL-STD-1750A Compatible

Reg. Bit
6
7 - 15
Transaction Word Register con’t
Name
POLL CONT
MASK BITS
Definition
Poll Operation Continue (Polling Mode only)
When set polling operation will continue with next
command in command stack.
When Not Set, polling operation will terminate after transaction is complete.
Last transfer in polling sequence must have this bit cleared.
0 = Not Set
1 = Set
Returned Status Word Bit Masks
1 = Masked
0 = Not Masked
When a non masked bit in the returned status word(s) is set the transaction is
declared not valid.
Bit
Status Bit
7
Terminal Flag
8
Dynamic Bus Control Acceptance
9
Subsystem Flag
10
Busy Bit *
11
Broadcast Command Received
12
Reserved Bits (any or all of 3)
13
Service Request Bit
14
Instrumentation Bit
15
Message Error Bit
* Note: Setting the busy bit mask will not mask a busy
response (i.e. declare it valid). When data is not
returned, in response to a transmit command.
SCDCT1611 Rev A
21