CT1611 Datasheet, PDF (20/24 Pages) Aeroflex Circuit Technology – DMA Controller with Buffer Memory,MIL-STD-1750A Compatible

Transaction Word Register
MSB
LSB
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Used only in BC mode
Contains information not explicitly contained in command word.
Defines:
1. Type of Transfer
2. Selection of bus
- selects 1 of 4
Note: Most systems
are only dual
redundant
3. Continue, for continuous poll operation
4. Conditions for defining an invalid transfer via Bit masks for returned status words.
5. Continue/last control bit for framing poll operations.
This register is loaded via I/O Command. It is also loaded during a Polling Operation, via DMA from the polling
command stack.
Reg. Bit
0-2
Name
TRANS TYPE
Definition
Specifies Transaction Type
Bit 2 Bit 1 Bit 0
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
Transaction
NORMAL Receive or Transmit
RT to RT
No Operation
Mode WITHOUT data
No Operation
Mode with RETURNED data
No Operation
Mode with associated data
3-4
BUS
Selection of Bus
Bit 4
Bit 3
Bus
0
0
"0" or "A"
0
1
"1" or "B"
1
0
"2" or "C"
1
1
"3" or "D"
5
DMA3RD
Polling Sequence Option (Polling Mode only)
For use with RT to RT transfers and code with associated data transfers.
When set, during polling sequence, the second command word (for RT to RT
transfers) or the data word (for mode with associated data transfers) is loaded
from the command stack.
Otherwise the last entry in the second command/and register will be used in
transfer.
0 = Not Set
1 = Set
SCDCT1611 Rev A
20