CT1611 Datasheet, PDF (11/24 Pages) Aeroflex Circuit Technology – DMA Controller with Buffer Memory,MIL-STD-1750A Compatible

Summary of I/O Commands for CT1611 1553B Interface
(All Codes HEX)
Bus Controller I/O
(Read Only)
Sync Word
(Write Only)
(Write Only)
Reset I
Reset II
(Read or Write) Operational word
Address
Code
(8 Bit Mode)
Description
XX3A
XX2E
XX2C
1. Mode Data
-to be received
2. Same as returned mode in BC mode
Resets CT1611 interface only
Resets CT1611 and CT1610 front end, will reset bits in returning
status word such as "TF" flag. Same as hard wired master reset used
on power up.
XX0A
Defines BC mode and RTU mode.
Data
FFF0 = RTU
FFF1 = BC
Note: Powers up and is reset to busy RTU.
RTU Mode
1. Conditions for Busy
When the CT1611 is declared busy, the DMA data transfer operation is inhibited. Mode data is stored in internal registers, and is
therefore unaffected by busy. The bust bit is located in the Operation Register.
1.1 Busy Set by I/O and POR / RESET
1.2 DMA not complete
(This in general should never occur).
1.3 FIFO Test
1.4 Receive Commands
If a Terminal is declared busy during the reception of a valid message, that message will be received and a DMA
request will be generated.
Data will be held indefinately until the DMA request is acknowledged.
Once the DMA is completed, a valid message received interrupt will be generated.
1.5 Transmit Commands
If the subsystem is going to enter a non-interruptable mode and therefore declares itself busy and the condition exists
that a transmit command may be received "simultaneously", the subsystem should wait 6µsec before beginning. (If a
DMA request is not made during this time, none will be made until the terminal is declared not busy).
This insures:
a. HSFAIL will not occur because of the busy condition missing the command word.
b. DMA issued, that can’t be acknowledged at a "non-interruptable time" by the microprocessor subsystem.
SCDCT1611 Rev A
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