CT1611 Datasheet, PDF (18/24 Pages) Aeroflex Circuit Technology – DMA Controller with Buffer Memory,MIL-STD-1750A Compatible

Error Register
MSB
LSB
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
The error Register is reset by: - I/O reg reset command
- I/O reset command
- Power on reset (master reset)
- Initiation of transfer in BC mode
Bit
Name
0*
RTADER
1*
PARER
2*
ERROR
3*
LTFAIL
4
HSFAIL
5
TXTO
6
DMA TO
* Additional information
for interpretation of
Register Bits 0-3.
Bit
Name
7
DBCACC
8
TRANS TO
Indication (When Set)
- RTU address Error (Parity)
- Parity error in command or data word
- Any waveform encoding error in received data
- Bad Manchester
- Bad Parity
- Bad Data Sync
- Non Contiguity of data
- Encoding error in terminals transmission
- Includes RT address parity
- Subsystem has not acknowledged DMA request in sufficient time.
- Transmitter timeout error indicates 1553 transmitter has transmitted in excess
of 680µsec and terminal fail safe timeout has turned off transmitter. NOTE:
1553B Max. is 800µs. If terminal timeout hardware (RT) fails self test mode
command (Indicate self test), this bit will also be set.
- DMA Time Out
Indicates failure in data transfer between CT1611 and subsystem. If DMA
takes longer than 80µsec this flag will be set and DMA will be initiated.
Reg. Bits
3210
0100
0110
1 XX 1
Indication
Waveform encoding error (Manchester)
Data parity error
RTU address error
Definition
Dynamic Bus Control Acceptance
Active only in RTU mode.
Indicates RTU has accepted bus controller request.
RTU must switch to BC mode.
Transaction Time Out
Active BC mode only
Indicates BC transfer has failed due to loopmouthing RTU or non functioning
transceive in BC.
Occurs approximately 780µsec after transfer is triggered.
SCDCT1611 Rev A
18