CT1611 Datasheet, PDF (17/24 Pages) Aeroflex Circuit Technology – DMA Controller with Buffer Memory,MIL-STD-1750A Compatible

Reg. Bit
6,7
Name
TEST
8
NO OP
9
PACT
10
DBCACC
11
12
13
14-15
SSERR
BUSY
TRANSACT
SERVRQ
Operation Register con’t
Definition
FIFO Loop Tests
A. 1553 Side Loop
NO DMA occurs
B. SUBYSTEM (Microprocessor) Side Loop
1553 Side Set BUSY
FIFO Exercised via
I/O Test Trigger Load Command
and
I/O Test Trigger Unload Command
Bit 7
0
1
1
0
Bit 6
0
1
0
1
Test
RESET
Test A
Test B
Not Valid
TEST A/B
TEST ENABLE
NO OPERATION (Wait) when in poll mode (BC).
POLL ACTIVE
PACT = 1 indicates that a POLLING operation has been triggered.
RTU Dynamic Bus Controll Acceptance when set in RTU Mode, Rtu will
accept bus control request as per MIL-PRF-1553B
0 = Not Set
1 = Set
Sets subsystem error flag in returned status word (RTU Mode Only).
Sets busy bit in returned status word, inhibits DMA (RTU Mode only).
TRANSFER ACTIVITY
TRANSACT = 1 indicates a Transaction has been initiated and is in progress.
Sets Service Request in returned status word (RTU Mode only).
Bit 15
0
0
1
1
Bit 14
0
1
0
1
Flag
NOT Set
SET until reset
Set until VECTOR word is transmitted
Set until reset *
* Bit 15 is ALWAYS RESET after VECTOR Word is transmitted.
SCDCT1611 Rev A
17