ADP1853 Datasheet, PDF (7/28 Pages) Analog Devices – Synchronous, Step-Down DC-to-DC Controller

Data Sheet
SIMPLIFIED BLOCK DIAGRAM
VIN VCCO
THERMAL
SHUTDOWN
0.6V
EN
LDO
UVLO
LOGIC
OV
REF
0.6V
UV
EN_SW
SL_TH
FB
SLAVE
AGND
VCCO
CLKOUT
SYNC
FREQ
COMP
FB
TRK
SS
RAMP
1MΩ
OSCILLATOR
OV_TH
OV
LOGIC
UV
12.5kΩ
SLAVE
FB
–
ERROR
+
AMPLIFIER
+
+
V_REF = 0.6V
VCCO
6.5µA
LOGIC OV
FAULT
3kΩ
EN OVER_LIM
UV_TH
CLK
–
0.9V
+
EN_SW
OVER_LIM
OV
PULSE SKIP
DRIVER LOGIC
CONTROL AND
STATE
MACHINE
–
+
PWM
COMPARATOR
CS GAIN
DCM ₊
SLOPE COMPENSATION
AND RAMP GENERATOR
AV = 0,* 3, 6, 12
ZERO –
CROSS
DETECT
– _{CURRENT SENSE}
+ ^AMPLIFIER
VCCO
VCCO
VCCO
OVER_LIM
CURRENT-LIMIT
CONTROL
+
–
50µA
PGOOD
BST
DH
SW
CS
DL
PGND
ILIM
*0 (ZERO) GAIN IS FOR VOLTAGE MODE WITH RAMP FROM 0.7V TO 2.2V.
Figure 2.
ADP1853
Rev. 0 | Page 7 of 28