ADP1853 Datasheet, PDF (4/28 Pages) Analog Devices – Synchronous, Step-Down DC-to-DC Controller

ADP1853
Parameter
LOGIC INPUTS
EN
EN Hysteresis
EN Input Leakage Current
SYNC Logic Input Low
SYNC Logic Input High
SYNC Input Pull-Down Resistance
GATE DRIVERS
DH Rise Time
DH Fall Time
DL Rise Time
DL Fall Time
DH to DL Dead Time
DH or DL Driver R_ON, Sourcing
Current¹
Symbol
I_EN
R_SYNC
R_{ON_SOURCE}
DH or DL Driver R_ON, Tempco
DH or DL Driver R_ON, Sinking
Current¹
TC_RON
R_{ON_SINK}
DH Maximum Duty Cycle¹
DH Maximum Duty Cycle¹
Minimum DH On Time
Minimum DH Off Time
Minimum DL On Time
COMP VOLTAGE RANGE
COMP Pulse Skip Threshold
COMP Clamp High Voltage
THERMAL SHUTDOWN
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
OVERVOLTAGE AND POWER GOOD
THRESHOLDS
FB Overvoltage Threshold
FB Overvoltage Hysteresis
FB Undervoltage Threshold
FB Undervoltage Hysteresis
TRK INPUT VOLTAGE RANGE¹
FB TO TRK OFFSET VOLTAGE
SOFT START
SS Output Current
SS Pull-Down Resistor
FB to SS offset
V_COMP,THRES
V_COMP,HIGH
T_TMSD
V_OV
V_UV
I_SS
Test Conditions/Comments
EN rising
V_IN = 2.75 V to 20 V
C_DH = 3 nF, V_BST − V_SW = 5 V
C_DH = 3 nF, V_BST − V_SW = 5 V
C_DL = 3 nF
C_DL = 3 nF
External 3 nF is connected to DH and DL
Sourcing 2 A with a 100 ns pulse
Sourcing 1 A with a 100 ns pulse, V_IN = 3 V
V_IN = 3 V or 12 V
Sinking 2 A with a 100 ns pulse
Sinking 1 A with a 100 ns pulse, V_IN = 3 V
f_OSC = 300 kHz
f_OSC = 1500 kHz
f_OSC = 200 kHz to 1500 kHz
f_OSC = 200 kHz to 1500 kHz
f_OSC = 200 kHz to 1500 kHz
In pulse skip mode (PSM)
V_FB rising
V_FB falling
TRK = 0.1 V to 0.57 V; offset = V_FB − V_TRK
During startup
During a fault condition
V_SS = 0.1 V to 0.6 V; offset = V_FB − V_SS
Data Sheet
Min
Typ Max Unit
0.57
0.63 0.68
V
0.03
V
1
200
nA
1.3
V
1.9
V
1
MΩ
16
ns
14
ns
16
ns
14
ns
25
ns
2
Ω
2.3
Ω
0.3
%/^oC
1.5
Ω
2
90
50
Ω
%
%
85
ns
345
ns
295
ns
0.9
V
2.2
V
155
°C
20
°C
0.630 0.65
18
0.525 0.55
15
0
−10
0
4.6
6.5
3
−10
0.670 V
mV
0.575 V
mV
5
V
+10
mV
8.4
µA
kΩ
+10
mV
Rev. 0 | Page 4 of 28