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ADP1853 Datasheet, PDF (17/28 Pages) Analog Devices – Synchronous, Step-Down DC-to-DC Controller
Data Sheet
APPLICATIONS INFORMATION
ADIsimPower DESIGN TOOL
The ADP1853 is supported by the ADIsimPower design tool
set. ADIsimPower is a collection of tools that produce complete
power designs optimized to a specific design goal. The tools
allow the user to generate a full schematic, bill of materials, and
calculate performance in minutes. ADIsimPower can optimize
designs for cost, area, efficiency, and parts count while taking
into consideration the operating conditions and limitations of
the IC and all real external components. The ADIsimPower tool
can be found at www.analog.com/ADIsimPower and the user
can request an unpopulated board through the tool.
SETTING THE OUTPUT VOLTAGE
The output voltage is set using a resistive voltage divider from
the output to FB. For RBOT, use a 1 kΩ to 20 kΩ resistor. Choose
RTOP to set the output voltage by using the following equation:
R TOP
=
R BOT

VOUT − VFB
VFB

where:
RTOP is the high-side voltage divider resistance.
RBOT is the low-side voltage divider resistance.
VOUT is the regulated output voltage.
VFB is the feedback regulation threshold, 0.6 V.
SOFT START
The soft start period is set by an external capacitor between
SS and AGND. The soft start function limits the input inrush
current and prevents output overshoot. When EN is enabled,
a current source of 6.5 µA starts charging the capacitor, and
the regulation voltage is reached when the voltage at SS reaches
0.6 V. The soft start time is approximated by
0.6 V
tSS = 6.5 μA CSS
The SS pin reaches a final voltage equal to VCCO.
When a controller is disabled, for instance, if EN is pulled low
or experiences an overcurrent limit condition, the soft start
capacitor is discharged through an internal 3 kΩ pull-down
resistor.
SETTING THE CURRENT LIMIT
The current-limit comparator measures the voltage across the
low-side MOSFET to determine the load current.
ADP1853
The current limit is set by an external current-limit resistor,
RILIM, between ILIM and CS. The current sense pin, ILIM,
sources nominally 50 μA to this external resistor. This creates
an offset voltage of RILIM multiplied by 50 μA. When the drop
across the current sense element RCS (a sense resistor or low-
side MOSFET, RDSON) is equal to or greater than this offset
voltage, the ADP1853 flags a current-limit event.
RILIM
=
1.06 × ILPK × RCS
50 μA
where:
ILPK is the peak inductor current.
ACCURATE CURRENT-LIMIT SENSING
RDSON of the MOSFET can vary by more than 50% over the
temperature range. Accurate current-limit sensing is achieved
by adding a current sense resistor from the source of the low-
side MOSFET to PGND. Make sure that the power rating of the
current sense resistor is adequate for the application. Figure 25
illustrates the implementation of accurate current-limit sensing.
VIN
ADP1853
DH
CS
ILIM
DL
RILIM
RSENSE
Figure 25. Accurate Current-Limit Sensing
INPUT CAPACITOR SELECTION
Use two parallel capacitors placed close to the drain of the high-
side switch MOSFET (one bulk capacitor of sufficiently high
current rating and a 10 μF ceramic decoupling capacitor).
Select an input bulk capacitor based on its ripple current
rating. The minimum input capacitance required for a
particular load is
C IN ,MIN
=
(VPP
IO × D(1 − D)
− IO × DRESR ) f SW
where:
IO is the output current.
D is the duty cycle.
VPP is the desired input ripple voltage.
RESR is the equivalent series resistance of the capacitors.
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