ADP1853 Datasheet, PDF (19/28 Pages) Analog Devices – Synchronous, Step-Down DC-to-DC Controller

Data Sheet
MOSFET SELECTION
The choice of MOSFET directly affects the dc-to-dc converter
performance. A MOSFET with low on resistance reduces I²R
losses, and low gate charge reduces transition losses. The
MOSFET should have low thermal resistance to ensure that the
power dissipated in the MOSFET does not result in excessive
MOSFET die temperature.
The high-side MOSFET carries the load current during on time
and usually carries most of the transition losses of the converter.
Typically, the lower the on resistance of the MOSFET, the
higher the gate charge and vice versa. Therefore, it is important
to choose a high-side MOSFET that balances the two losses.
The conduction loss of the high-side MOSFET is determined
by the equation
P_C = (I _LOAD(RMS) )² ×R_DSON
where:
R_DSON is the MOSFET on resistance.
The gate charging loss is approximated by the equation
P_G ≅ V_PV × Q_G × f_SW
where:
V_PV is the gate driver supply voltage.
Q_G is the MOSFET total gate charge.
Note that the gate charging power loss is not dissipated in the
MOSFET but rather in the ADP1853 internal drivers. This
power loss should be taken into consideration when calculating
the overall power efficiency.
The high-side MOSFET transition loss is approximated by the
equation
P_T
≅
V_IN
×
I _LOAD
× (t _R
2
+ t_F)×
f _SW
where:
P_T is the high-side MOSFET switching loss power.
t_R is the rise time in charging the high-side MOSFET.
t_F is the fall time in discharging the high-side MOSFET.
t_R and t_F can be estimated by
t_R
≅
Q_GSW
I _{DRIVER _ RISE}
t_F
≅
Q_GSW
I _{DRIVER _ FALL}
where:
Q_GSW is the gate charge of the MOSFET during switching and is
given in the MOSFET data sheet.
I_{DRIVER_RISE} and I_{DRIVER_FALL} are the driver current output from the
ADP1853 internal gate drivers.
ADP1853
If Q_GSW is not given in the data sheet, it can be approximated by
Q_GSW
≅ Q_GD
+ ^QGS
2
where:
Q_GD and Q_GS are the gate-to-drain and gate-to-source charges
given in the MOSFET data sheet.
I_{DRIVER_RISE} and I_{DRIVER_FALL} can be estimated by
I _{DRIVER _ RISE}
≅
V_DD − V_SP
R_{ON _ SOURCE} + R_GATE
I _{DRIVER _ FALL}
≅
V_SP
R_{ON _ SINK} + R_GATE
where:
V_DD is the input supply voltage to the driver and is between
2.75 V and 5 V, depending on the input voltage.
V_SP is the switching point where the MOSFET fully conducts;
this voltage can be estimated by inspecting the gate charge
graph given in the MOSFET data sheet.
R_{ON_SOURCE} is the on resistance of the ADP1853 internal driver,
given in Table 1, when charging the MOSFET.
R_{ON_SINK} is the on resistance of the ADP1853 internal driver,
given in Table 1, when discharging the MOSFET.
R_GATE is the on gate resistance of MOSFET given in the
MOSFET data sheet. If an external gate resistor is added, add
this external resistance to R_GATE.
The total power dissipation of the high-side MOSFET is the
sum of conduction and transition losses:
P_HS ≅ P_C + P_T
The synchronous rectifier, or low-side MOSFET, carries the
inductor current when the high-side MOSFET is off. The low-
side MOSFET transition loss is small and can be neglected in
the calculation. For high input voltage and low output voltage,
the low-side MOSFET carries the current most of the time.
Therefore, to achieve high efficiency, it is critical to optimize
the low-side MOSFET for low on resistance. In cases where the
power loss exceeds the MOSFET rating or lower resistance is
required than is available in a single MOSFET, connect multiple
low-side MOSFETs in parallel. The equation for low-side
MOSFET conduction power loss is
P_CLS = (I _LOAD(RMS) )² × R_DSON
Rev. 0 | Page 19 of 28