ADSP-SC582 Datasheet, PDF (64/168 Pages) Analog Devices – SHARC plus Dual Core DSP with ARM Cortex-A5

ADSP-SC582/583/584/587/589/ADSP-21583/584/587 ^{Preliminary Technical Data}
Table 26. ADSP-SC58x/ADSP-2158x Designer Quick Reference (Continued)
Signal Name
DMC1_BA1
Type
Output
Driver ^Int
Type Term
B
none
Reset
Term
none
Reset
Drive
none
DMC1_BA2
Output
B
none
none
none
DMC1_CAS
Output
B
none
none
none
DMC1_CK
DMC1_CKE
DMC1_CK
DMC1_CS0
DMC1_DQ00
DMC1_DQ01
DMC1_DQ02
DMC1_DQ03
DMC1_DQ04
DMC1_DQ05
DMC1_DQ06
DMC1_DQ07
Output
C
Output
B
Output
C
Output
B
InOut
B
InOut
B
InOut
B
InOut
B
InOut
B
InOut
B
InOut
B
InOut
B
none
none
none
none
none
none
none
none
Internal logic none
ensures that
input signal does
not float
Internal logic none
ensures that
input signal does
not float
Internal logic none
ensures that
input signal does
not float
Internal logic none
ensures that
input signal does
not float
Internal logic none
ensures that
input signal does
not float
Internal logic none
ensures that
input signal does
not float
Internal logic none
ensures that
input signal does
not float
Internal logic none
ensures that
input signal does
not float
L
L
L
none
none
none
none
none
none
none
none
none
Power Domain
VDD_DMC
VDD_DMC
VDD_DMC
VDD_DMC
VDD_DMC
VDD_DMC
VDD_DMC
VDD_DMC
VDD_DMC
VDD_DMC
VDD_DMC
VDD_DMC
VDD_DMC
VDD_DMC
VDD_DMC
Description
and Notes
Desc: DMC1 Bank Address Input
1
Notes: No notes
Desc: DMC1 Bank Address Input
2
Notes: No notes
Desc: DMC1 Column Address
Strobe
Notes: No notes
Desc: DMC1 Clock
Notes: No notes
Desc: DMC1 Clock enable
Notes: No notes
Desc: DMC1 Clock (complement)
Notes: No notes
Desc: DMC1 Chip Select 0
Notes: No notes
Desc: DMC1 Data 0
Notes: No notes
Desc: DMC1 Data 1
Notes: No notes
Desc: DMC1 Data 2
Notes: No notes
Desc: DMC1 Data 3
Notes: No notes
Desc: DMC1 Data 4
Notes: No notes
Desc: DMC1 Data 5
Notes: No notes
Desc: DMC1 Data 6
Notes: No notes
Desc: DMC1 Data 7
Notes: No notes
Rev. PrF | Page 64 of 168 | February 2016