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ADSP-SC582 Datasheet, PDF (130/168 Pages) Analog Devices – SHARC plus Dual Core DSP with ARM Cortex-A5
ADSP-SC582/583/584/587/589/ADSP-21583/584/587 Preliminary Technical Data
TMR OUTPUT
TMR INPUT
tWH, tWL
tHTO
Figure 54. Timer Cycle Timing
DAIx Pin to DAIx Pin Direct Routing (DAI0 and DAI1)
Table 77 and Figure 55 describe I/O timing, related to the digital audio interface (DAI). For direct pin connections only (for example
DAIx_PB01_I to DAIx_PB02_O).
Table 77. DAI/DAI Pin to Pin Routing
All specifications are based on simulation data and are subject to change without notice.
Parameter
Min
Max
Unit
Timing Requirement
tDPIO
Delay DAI Pin Input Valid to DAI Output Valid
1.5
12
ns
DAI_Pn
DAI_Pm
tDPIO
Figure 55. DAI Pin to Pin Direct Routing
Up/Down Counter/Rotary Encoder Timing
Table 78 and Figure 56 describe timing, related to the general-purpose counter (CNT).
Table 78. Up/Down Counter/Rotary Encoder Timing
All specifications are based on simulation data and are subject to change without notice.
Parameter
Min
Max
Timing Requirement
tWCOUNT
Up/Down Counter/Rotary Encoder Input Pulse Width
2 × tSCLK0
CNT0_UD
CNT0_DG
CNT0_ZM
tWCOUNT
Figure 56. Up/Down Counter/Rotary Encoder Timing
Unit
ns
Rev. PrF | Page 130 of 168 | February 2016