EVAL-ADF7021DBZ5 Datasheet, PDF (61/64 Pages) Analog Devices – High Performance Narrow-Band Transceiver IC

Data Sheet
REGISTER 15—TEST MODE REGISTER
ANALOG_TEST_
MODES
PLL_TEST_
MODES
CLK_-MUX
ADF7021
Σ-Δ_TEST_
MODES
Tx_TEST_
MODES
Rx_TEST_
MODES
ADDRESS
BITS
CAL OVERRIDE
0 AUTO CAL
1 OVERRIDE GAIN
2 OVERRIDE BW
3 OVERRIDE BW AND GAIN
REG1 PD
0 NORMAL
1 PWR DWN
FORCE LD HIGH
0 NORMAL
1 FORCE
ANALOG TEST MODES
0 BAND GAP VOLTGE
1 40µA CURRENT FROM REG4
2 FILTER I CHANNEL: STAGE 1
3 FILTER I CHANNEL: STAGE 2
4 FILTER I CHANNEL: STAGE 1
5 FILTER Q CHANNEL: STAGE 1
6 FILTER Q CHANNEL: STAGE 2
7 FILTER Q CHANNEL: STAGE 1
8 ADC REFERENCE VOLTAGE
9 BIAS CURRENT FROM RSSI 5µA
10 FILTER COARSE CAL OSCILLATOR O/P
11 ANALOG RSSI I CHANNEL
12 OSET LOOP +VE FBACK V (I CH)
13 SUMMED O/P OF RSSI RECTIFIER+
14 SUMMED O/P OF RSSI RECTIFIER–
15 BIAS CURRENT FROM BB FILTER
PLL TEST MODES
0 NORMAL OPERATION
1 R DIV
2 N DIV
3 RCNTR/2 ON MUXOUT
4 NCNTR/2 ON MUXOUT
5 ACNTR TO MUXOUT
6 PFD PUMP UP TO MUXOUT
7 PFD PUMP DN TO MUXOUT
8 SDATA TO MUXOUT (OR SREAD?)
9 ANALOG LOCK DETECT ON MUXOUT
10 END OF COARSE CAL ON MUXOUT
11 END OF FINE CAL ON MUXOUT
12 FORCE NEW PRESCALER CONFIG.
FOR ALL N
13 TEST MUX SELECTS DATA
14 LOCK DETECT PERCISION
15 RESERVED
PFD/CP TEST MODES
0 DEFAULT, NO BLEED
1 (+VE) CONSTANT BLEED
2 (–VE) CONSTANT BLEED
3 (–VE) PULSED BLEED
4 (–VE) PULSE BLD, DELAY UP?
5 CP PUMP UP
6 CP TRI-STATE
7 CP PUMP DN
Σ-Δ TEST MODES
0 DEFAULT, 3RD ORDER SD, NO DITHER
1 1ST ORDER SD
2 2ND ORDER SD
3 DITHER TO FIRST STAGE
4 DITHER TO SECOND STAGE
5 DITHER TO THIRD STAGE
6 DITHER × 8
7 DITHER × 32
Tx TEST MODES
0 NORMAL OPERATION
1 Tx CARRIER ONLY
2 Tx +VE TONE ONLY
3 Tx –VE TONE ONLY
4 Tx "1010" PATTERN
5 Tx PN9 DATA, AT PROGRAMED RATE
6 Tx SYNC BYTE REPEATEDLY
Rx TEST MODES
0 NORMAL
1 SCLK, SDATA -> I, Q
2 REVERSE I,Q
3 I,Q TO TxRxCLK, TxRxDATA
4 3FSK SLICER ON TxRxDATA
5 CORRELATOR SLICER ON TxRxDATA
6 LINEAR SLICER ON RXDATA
7 SDATA TO CDR
8 ADDITIONAL FILTERING ON I, Q
9 ENABLE REG 14 DEMOD PARAMETERS
10 POWER DOWN DDT AND ED IN T/4 MODE
11 ENVELOPE DETECTOR WATCHDOG DISABLED
12 RESERVED
13 PROHIBIT CALACTIVE
14 FORCE CALACTIVE
15 ENABLE DEMOD DURING CAL
CLK MUXES on CLKOUT pin
0 NORMAL, NO OUTPUT
1 DEMOD CLK
2 CDR CLK
3 SEQ CLK
4 BB OFFSET CLK
5 SIGMA DELTA CLK
6 ADC CLK
7 _TxRxCLK
Figure 77. Register 15—Test Mode Register Map
Rev. B | Page 61 of 64