EVAL-ADF7021DBZ5 Datasheet, PDF (27/64 Pages) Analog Devices – High Performance Narrow-Band Transceiver IC

Data Sheet
Setting the Transmit Data Rate
In all modulation modes except oversampled 2FSK mode, an
accurate clock is provided on the TxRxCLK pin to latch the data
from the microcontroller into the transmit section at the required
data rate. The exact frequency of this clock is defined by
DATA CLK =
XTAL
DEMOD _ CLK _ DIVIDE×CDR _ CLK _ DIVIDE×32
where:
XTAL is the crystal or TCXO frequency.
DEMOD_CLK_DIVIDE is the divider that sets the demodulator
clock rate (R3_DB[6:9]).
CDR_CLK_DIVIDE is the divider that sets the CDR clock rate
(R3_DB[10:17]).
Refer to the Register 3—Transmit/Receive Clock Register
section for more programming information.
Setting the FSK Transmit Deviation Frequency
In all modulation modes, the deviation from the center
frequency is set using the Tx_FREQUENCY_DEVIATION bits
(R2_DB[19:27]).
The deviation from the center frequency in Hz is as follows:
For direct RF output,
fDEV [Hz] =
PFD ×Tx _ FREQUENCY _ DEVIATION
2¹⁶
For RF_DIVIDE_BY_2 enabled,
fDEV
[Hz]
=
0.5×
PFD ×Tx
_ FREQUENCY
2¹⁶
_
DEVIATION
where Tx_FREQUENCY_DEVIATION is a number from 1 to
511 (R2_DB[19:27]).
In 4FSK modulation, the four symbols (00, 01, 11, 10) are
transmitted as ±3 × fDEV and ±1 × fDEV.
Binary Frequency Shift Keying (2FSK)
Two-level frequency shift keying is implemented by setting the
N value for the center frequency and then toggling it with the
TxDATA line. The deviation from the center frequency is set
using the Tx_FREQUENCY_DEVIATION bits, R2_DB[19:27].
2FSK is selected by setting the MODULATION_SCHEME bits
(R2_DB[4:6]) to 000.
Minimum shift keying (MSK) or Gaussian minimum shift
keying (GMSK) is supported by selecting 2FSK modulation
and using a modulation index of 0.5. A modulation index of
0.5 is set up by configuring R2_DB[19:27] for a FREQDEVIATION =
0.25 × transmit data rate.
ADF7021
3-Level Frequency Shift Keying (3FSK)
In 3-level FSK modulation (also known as modified Duobinary
FSK), the binary data (Logic 0 and Logic 1) is mapped onto
three distinct frequencies, the carrier frequency (fC), the carrier
frequency minus a deviation frequency (fC − fDEV), and the
carrier frequency plus the deviation frequency (fC + fDEV).
A Logic 0 is mapped to the carrier frequency while a Logic 1 is
either mapped onto frequency fC − fDEV or fC + fDEV.
0
–1
+1
f_C – f_DEV f_C f_C + f_DEV
RF FREQUENCY
Figure 41. 3FSK Symbol-to-Frequency Mapping
Compared to 2FSK, this bits-to-frequency mapping results in a
reduced transmission bandwidth because some energy is removed
from the RF sidebands and transferred to the carrier frequency.
At low modulation index, 3FSK improves the transmit spectral
efficiency by up to 25% when compared to 2FSK.
Bit-to-symbol mapping for 3FSK is implemented using a linear
convolutional encoder that also permits Viterbi detection to be
used in the receiver. A block diagram of the transmit hardware
used to realize this system is shown in Figure 42. The convolu-
tional encoder polynomial used to implement the transmit
spectral shaping is
P(D) = 1 − D²
where:
P is the convolutional encoder polynomial.
D is the unit delay operator.
A digital precoder with transfer function 1/P(D) implements an
inverse modulo-2 operation of the 1 − D² shaping filter in the
transmitter.
Tx DATA
0, 1 _PRECODER 0, 1
1/P(D)
CONVOLUTIONAL
ENCODER
P(D)
0, +1, –1
FSK MOD
CONTROL
AND
DATA FILTERING
f_C
f_C + f_DEV
f_C – f_DEV
TO
N DIVIDER
Figure 42. 3FSK Encoding
The signal mapping of the input binary transmit data to the
3-level convolutional output is shown in Table 10. The
convolutional encoder restricts the maximum number of
sequential +1s or −1s to two and delivers an equal number of
+1s and −1s to the FSK modulator, thus ensuring equal spectral
energy in both RF sidebands.
Rev. B | Page 27 of 64