EVAL-ADF7021DBZ5 Datasheet, PDF (5/64 Pages) Analog Devices – High Performance Narrow-Band Transceiver IC

Data Sheet
ADF7021
SPECIFICATIONS
VDD = 2.3 V to 3.6 V, GND = 0 V, TA = TMIN to TMAX, unless otherwise noted. Typical specifications are at VDD = 3 V, TA = 25°C.
All measurements are performed with the EVAL-ADF7021DBx using the PN9 data sequence, unless otherwise noted.
RF AND PLL SPECIFICATIONS
Table 1.
Parameter
RF CHARACTERISTICS
Frequency Ranges (Direct Output)
Frequency Ranges (RF Divide-by-2 Mode)
Phase Frequency Detector (PFD) Frequency¹
PHASE-LOCKED LOOP (PLL)
VCO Gain²
868 MHz, Internal Inductor VCO
434 MHz, Internal Inductor VCO
426 MHz, External Inductor VCO
160 MHz, External Inductor VCO
Phase Noise (In-Band)
868 MHz, Internal Inductor VCO
433 MHz, Internal Inductor VCO
426 MHz, External Inductor VCO
Phase Noise (Out-of-Band)
Normalized In-Band Phase Noise Floor³
PLL Settling
REFERENCE INPUT
Crystal Reference⁴
External Oscillator^{4, 5}
Crystal Start-Up Time⁶
XTAL Bias = 20 µA
XTAL Bias = 35 µA
Input Level for External Oscillator⁷
OSC1
OSC2
ADC PARAMETERS
INL
DNL
Min
160
862
80
431
RF/256
3.625
3.625
Typ
58
29
27
6
−97
−103
−95
−124
−203
40
0.930
0.438
0.8
CMOS levels
±0.4
±0.4
Max
650
950
325
475
26/30
26
30
Unit
MHz
MHz
MHz
MHz
MHz
MHz/V
MHz/V
MHz/V
MHz/V
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
µs
MHz
MHz
ms
ms
V p-p
V
LSB
LSB
Test Conditions/Comments
See Table 9 for required VCO_BIAS and
VCO_ADJUST settings
External inductor VCO
Internal inductor VCO
External inductor VCO, RF divide-by-2 enabled
Internal inductor VCO, RF divide-by-2 enabled
Crystal reference/external reference
VCO_ADJUST = 0, VCO_BIAS = 8
VCO_ADJUST = 0, VCO_BIAS = 8
VCO_ADJUST = 0, VCO_BIAS = 3
VCO_ADJUST = 0, VCO_BIAS = 2
10 kHz offset, PA = 10 dBm, VDD = 3.0 V,
PFD = 19.68 MHz, VCO_BIAS = 8
10 kHz offset, PA = 10 dBm, VDD = 3.0 V,
PFD = 19.68 MHz, VCO_BIAS = 8
10 kHz offset, PA = 10 dBm, VDD = 3.0 V,
PFD = 9.84 MHz, VCO_BIAS = 3
1 MHz offset, fRF = 433 MHz, PA = 10 dBm,
VDD = 3.0 V, PFD = 19.68 MHz, VCO_BIAS = 8
Measured for a 10 MHz frequency step to within
5 ppm accuracy, PFD = 19.68 MHz, loop
bandwidth (LBW) = 100 kHz
10 MHz XTAL, 33 pF load capacitors, VDD = 3.0 V
10 MHz XTAL, 33 pF load capacitors, VDD = 3.0 V
Clipped sine wave
VDD = 2.3 V to 3.6 V, TA = 25°C
VDD = 2.3 V to 3.6 V, TA = 25°C
1 _{The maximum usable PFD at a particular RF frequency is limited by the minimum N divide value.}
2 _{VCO gain measured at a VCO tuning voltage of 1 V. The VCO gain varies across the tuning range of the VCO. The software package ADIsimPLL™ can be used to model this}
variation.
3 _{This value can be used to calculate the in-band phase noise for any operating frequency. Use the following equation to calculate the in-band phase noise performance}
as seen at the PA output: −203 + 10 log(fPFD) + 20 logN.
4 _{Guaranteed by design. Sample tested to ensure compliance.}
5 _{A TCXO, VCXO, or OCXO can be used as an external oscillator.}
6 _{Crystal start-up time is the time from chip enable (CE) being asserted to correct clock frequency on the CLKOUT pin.}
7 _{Refer to the Reference Input section for details on using an external oscillator.}
Rev. B | Page 5 of 64