COREFIR-XX Datasheet, PDF (5/14 Pages) Actel Corporation – CoreFIR Finite Impulse Response (FIR) Filter Generator

CoreFIR
Storage and Large Number of Taps
As seen in the previous section, the size of the lookup table is 2^ntaps, which is exponentially increased with more ntaps.
A design with a large number of taps needs to have several lookup tables. Let ntaps = p × q. If we split taps into p
groups, each group has q taps. Then the FIR becomes as shown in EQ 5:
nbits_in – 1
y[n] = _∑ 2^b
0
n=ntaps – 1
nbits_in – 1
∑ ^{c[n] x[n][b] =} ∑ ^2b
0
0
n=pq – 1
∑ ^{c[n] x[n][b]}
0
By splitting ntaps into two level summations, we have the result shown in EQ 6:
EQ 5
nbits_in – 1 i=p-1 j=q-1
y[n] = _{∑ 2}^b _{∑ ∑} c[iq + j] x[iq + j][b]
0
00
Refer to "FIR Filter with Large Number of Taps" on page 8 for further information.
EQ 6
General Description
The CoreFIR is an Actel FPGA-optimized RTL generator
that produces a finite impulse response filter. It
implements the DA algorithm to eliminate multiplication
for faster and smaller designs. The CoreFIR is a generator
which utilizes Actel FPGA’s embedded RAM blocks as DA
lookup tables (when available) to further reduce the size
of the design. The generator also reads the user system
clock rate and data sample rate to explore using a
folding or serial architecture to further reduce size,
especially when the system clock rate is much greater
than the data sampling rate. The generator
automatically switches to the use of multiple DA lookup
tables when the requested FIR filter has a large number
of taps. Figure 2 shows the functional block diagram of a
generated FIR filter design. More complex designs may
contain multiple lookup tables, accumulators, or control
sections.
datai
Coefficients
Input
Buffers
DA LUT
Generator
DA Lookup Tables
(RAMs or ROM)
Control
Shifter
Accumulator
datao
Figure 2 • Functional Block Diagram
Functional Block Description
The functional blocks shown in Figure 2 illustrate the architecture of the generated FIR filter using the DA algorithm.
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