COREFIR-XX Datasheet, PDF (3/14 Pages) Actel Corporation – CoreFIR Finite Impulse Response (FIR) Filter Generator

CoreFIR
Table 2 • Test Configurations
Configuration
nbits_input
1
8
2
16
3
12
4
12
5
16
6
16
nbits_coef
16
16
15
15
15
16
ntaps
8
16
32
32
64
128
fpga_family
All
All
All
AX, RTAX-S, APA
All
AX, RTAX-S, APA
coef_fixed
1
1
1
0
1
0
FIR Filter Using Distributed Arithmetic Algorithm
Distributed Arithmetic Algorithm Overview
FIR filters are used in applications that require exact linear phase response. Typical applications for a FIR filter include:
image processing, digital audio, digital communication, and biomedical signal processing. A FIR filter is defined in EQ 1:
where:
ntaps – 1
y[n] = _∑ c[n] × x[n]
0
EQ 1
c[n] = h[ntaps - n -1]
and h is the impulse response. The term ntaps is short for number of taps.
In summary, the direct computation for one point of FIR requires:
ntaps multiplications + (ntaps-1) additions.
Distributed Arithmetic (DA) is a well-known method for eliminating resources in multiply-and-accumulate structures
(MACs) implementing digital signal processing (DSP) functions. DA trades memory for combinatory elements, resulting
in an efficient implementation in FPGAs. Another feature of DA is its easy serialization of the input, which further
reduces the cost of operation when FIR data rate is low compared to the system clock, a common scenario in FIR
applications.
The input of a FIR can be expressed in the composition of its bits, as shown in EQ 2:
nbits_in – 1
x[n] = _∑ x[n][b] × 2^b
0
EQ 2
where x[n][b] is the b^th bit of x[n] and nbits_in is the number of bits of input. The resulting output of the FIR filter is
shown in EQ 3:
ntaps – 1
ntaps – 1 nbits_in – 1
y[n] = ∑ ^c[n]x[n] = ∑ ^c[n] ∑ ^x[n][b]2b
0
0
0
Changing the summation order gives the results shown in EQ 4:
EQ 3
nbits_in – 1 ntaps – 1
nbits_in – 1
y[n] =
∑
∑ ^2b
c[n] x[n][b] =
∑ ^2bT(X[b])
0
0
0
EQ 4
v3.0
3