COREFIR-XX Datasheet, PDF (4/14 Pages) Actel Corporation – CoreFIR Finite Impulse Response (FIR) Filter Generator

CoreFIR
ntaps – 1
where: T(X[b]) = _∑ c[n] x[n][b] and X[b] is a collection of the b^th bits of ntaps different taps.
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Note that the x[n][b] can only be 0 or 1. There are 2^ntaps different values of T. If T is pre-calculated and stored inside a
RAM or ROM, the FIR computation becomes nbits_in table lookup operations using x[b] and nbits_in–1 additions.
Multiplication operations are eliminated.
In summary, the FIR computation using DA for one point of FIR requires:
nbits_in table lookups + (nbits_in-1) additions.
The cost to eliminate multiplication is a memory block to store 2^ntaps pre-computed values.
The serialization of table lookup and addition is possible
because table T is the same for each b. If one table
The expression x[n][b] represents the b^th bit of input
x[n]. In the example, in the first cycle, all 0^th bits of input
lookup and one addition can be finished in one cycle, the x[n] to x[n-3] are fed into the lookup table as an input
total computation will finish in b cycles. The serialization address; in the second cycle, all 1^st bits of inputs input
of the FIR introduces further opportunity to reduce the
size of the design, which is the key to an efficient FPGA
design.
x[n] to x[n-3] are fed into the lookup table; in the third
cycle, all 2^nd bits of inputs input x[n] to x[n-3] are fed
into the lookup table; and in the fourth cycle, all 3^rd bits
of inputs input x[n] to x[n-3] are fed into the lookup
Example Design of a FIR Filter Using DA
table. The shifter shifts the outputs of the lookup table
for the inputs of the adder, which accumulates for the
An example of a FIR with four taps (ntaps = 4) and four final result.
bits for inputs (nbits_in = 4) is shown in Figure 1.
x[n][3]
x[n][2]
x[n][1]
x[n][0]
x[n-1][3] x[n-1][2] x[n-1][1] x[n-1][0]
x[n-2][3] x[n-2][2] x[n-2][1] x[n-2][0]
x[n-3][3] x[n-3][2] x[n-3][1] x[n-3][0]
Flow
Control
Lookup Table
Shifter
Adder
Reg
Figure 1 • Example Implementation of a Bit-Serialized FIR Using DA
The serialized DA implementation in Figure 1 uses a table lookup with 16 words, and takes four clock cycles to finish one FIR point.
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