ZADCS0882 Datasheet, PDF (9/20 Pages) Zentrum Mikroelektronik Dresden AG – 8-Bit, 300ksps, Serial Output ADC Family

Datasheet
ZADCS0882/0842/0822 Family
1.5.3 Specific Parameters of basic ZADCS08x2 versions (without Internal Reference)
(VDD = +2.7V to + 5.25V; fSCLK = 3.3MHz (50% duty cycle); 11 clocks/conversion cycle (300 ksps); qOP = qOPmin … qOPmax)
Parameter
Symbol Conditions
Min Typ Max Unit
External Reference at VREF
VREF Input Voltage Range
VREF Input Current
VREF Input Resistance
VREF = 2.5V
1.0
VDD +
50mV
V
180 215 µA
11.5 14
kW
Shutdown VREF Input Current
0.1 µA
Capacitive Bypass at VREF
4.7
µF
Power Requirements
Positive Supply Voltage
VDD
2.7
5.25 V
Positive Supply Current
ZADCS0882I, ZADCS0842I,
ZADCS0822I
Operating Mode
IDD
VDD = 3.6V
Full Power-Down
0.85 1.0
µA
0.5 4.0
Positive Supply Current
ZADCS0882I, ZADCS0842I,
ZADCS0822I
Operating Mode
IDD
VDD = 5.25V
Full Power-Down
1.00 1.3
µA
0.5 4.0
Positive Supply Current
ZADCS0882Q, ZADCS0842Q, IDD
ZADCS0822Q
Operating Mode
VDD = 3.6V
Full Power-Down
0.85
0.5
1.0¹⁾
15^{1) µA}
Positive Supply Current
ZADCS0882Q, ZADCS0842Q, IDD
ZADCS0822Q
Operating Mode
VDD = 5.25V
Full Power-Down
1.00
0.5
1.3¹⁾
20^{1) µA}
1) _{relaxed maximum limits are due to wider temperature range of automotive qualified version ZADCS08x2Q}
1.5.4 Digital Pin Parameters
(VDD = +2.7V to + 5.25V; fSCLK = 3.3MHz (50% duty cycle); 11 clocks/conversion cycle (300 ksps); qOP = qOPmin … qOPmax)
Parameter
Symbol Conditions
Min Typ Max
Unit
Digital Inputs (DIN, SCLK, CS, nSHDN)
Logic High Level
VIH
VDD = 2.7V
VDD = 5.25V
Logic Low Level
VIL
VDD = 2.7V
VDD = 5.25V
Hysteresis
VHyst
Input Leakage
IIN
VIN = 0V or VDD
Input Capacitance
CIN
Digital Outptus (DOUT, SSTRB)
Output High Current
IOH
VOH= VDD – 0.5V
Output Low Voltage
Three-State Leakage Current
Three-State Output Capacitance
IOL
ILeak
COUT
VOL= 0.4V
nCS = VDD
nCS = VDD
VDD = 2.7V
VDD = 5.25V
VDD = 2.7V
VDD = 5.25V
1.9
V
3.3
V
0.7 V
1.4 V
0.7
V
± 0.1 ± 1.0 µA
5
pF
3.5
8.5 mA
5.5
10.8 mA
4
11.5 mA
6.4
15.3 mA
± 0.1 ± 1.0 µA
5
pF
Copyright © 2008, ZMD AG, Rev. 1.1
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. The
Information furnished in this publication is preliminary and subject to changes without notice.
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