Z16C30_08 Datasheet, PDF (69/102 Pages) Zilog, Inc. – CMOS USC Universal Serial Controller

Z16C30
Product Specification
65
Address: 00011
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Reserved
Wait for Rx DMA Trigger
0 0 No Status Block
0 1 One Word Status Block
1 0 Two Word Status Block
1 1 Reserved
Rx Status
Block Transfer
0 0 All Zeros
0 1 All Ones
1 0 Alternating 1 and 0
1 1 Alternating 0 and 1
0 0 8 Bits
0 1 16 Bits
1 0 32 Bits
1 1 64 Bits
Tx Preamble
Length
Tx Preamble
Pattern
Tx Shaved Bit Length
(Async Only)
(All Sync)
Tx Flag Preamble
Wait for Tx DMA Trigger
0 0 No Status Block
0 1 One Word Status Block
1 0 Two Word Status Block
1 1 Reserved
Tx Status
Block Transfer
Figure 45. Channel Control Register
Address: 00100
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Figure 46. Primary Reserved Register
Reserved
DS007902-0708
PRELIMINARY
Functional Description