Z8F64820100ZCOG Datasheet, PDF (37/48 Pages) Zilog, Inc. – Power to the Board with overcurrent protection

Z8 Encore! XP^® F6482 Series Development Kit
User Manual
29
Figure 35. The J16 DBG Device
Jumper Settings
The functions of the F6482 Development Board’s six jumpers are described in Table 4.
Jumper
Name Description
J1
VREF–
J2
VREF+
J9
SPI Flash Select
J19
Audio Disable
J21
UART Configuration
J23
PIR Sensor Power
Source
Table 4. Jumper Settings
State
IN
OUT
IN
OUT
IN
OUT
IN
OUT
1–2,
5–6
3–4,
7–8
1–2
2–3
Function
GND is a source for VREF–
External source could be connected, or PB3 can
be used as a GPIO.
On-board source, 2.5 V, is VREF+.
Pin PB4 can be used as a GPIO, or the internal
source of VREF can be output here.
On-board SPI Flash can be used.
PC1 can be used as a GPIO.
On-board audio amplifier and speaker are dis-
abled.
On-board audio amplifier and speaker are
enabled.
UART0 enabled.
UART1 enabled.
VCC_T
VBIAS
Factory
Setting
IN
OUT
IN
OUT
IN
IN
UM026302-0916
Jumper Settings