Z8E520 Datasheet, PDF (35/43 Pages) Zilog, Inc. – 1.5 MBPS USB Device Controller

Zilog
Z8E520/C520
1.5 MBPS USB Device Controller
Z8^PLUS SYSTEM REGISTERS
The registers displayed in Figures 21–27 represent Zilog’s
new Z8^Plus architecture. For a complete overview of this
new technology, please refer to the Z8^Plus user’s manual
(UM97Z8X0300) available at your local Zilog sales office.
1
0FA
IRQ
D7
D6 D5 D4
D3 D2
D1 D0
IRQ0 = TIMER0 TIMEOUT
IRQ1 = TIMER1 TIMEOUT
IRQ2 = TIMER2 TIMEOUT
IRQ3 = HIGH PRIORITY COMM
IRQ4 = LOW PRIORITY COMM
IRQ5 = PORTS
RESERVED (MUST BE 0)
RESERVED (MUST BE 0)
FIXED INTERRUPT PRIORITY: IRQ0 > IRQ1 > IRQ2 > IRQ3 > IRQ4 > IRQ5
Figure 21. Interrupt Request Register
DS97KEY2005
PRELIMINARY
35