Z8E520 Datasheet, PDF (34/43 Pages) Zilog, Inc. – 1.5 MBPS USB Device Controller

Z8E520/C520
1.5 MBPS USB Device Controller
Zilog
FUNCTIONAL DESCRIPTIONS (Continued)
V_BO Circuit. The Voltage Brown Out circuit will detect
when voltage has dropped below the normal operating
voltage. The chip will maintain full core functionality and
RAM values will be preserved during the range from V_MIN
(V_CC = 4V) to V_BO; however, it may not meet worst case
AC and DC limits. At V_BO, the chip will be placed in reset
and maintained in that state until V_CC exceeds V_BO. When
this condition is reached, the chip will resume operation.
V_BO is set by design to 2.7 V ± 0.2 V.
STOP. This instruction turns off the internal clock and ex-
ternal ceramic resonator oscillation. It reduces the standby
current to less than 60 µA. The STOP Mode is terminated
by an interrupt. An interrupt from any of the active (en-
abled) interrupts will remove the chip from the STOP Mode
(Ports 31–33 including the USB reset.
Note: The timer cannot generate an interrupt in STOP
Mode because the clock is stopped.
The interrupt causes the processor to restart the applica-
tion program at the address or the vector of the interrupt
and continue the program at the end of the interrupt ser-
vice routine. In order to enter STOP (or HALT) Mode, it is
necessary to first flush the instruction pipeline to avoid sus-
pending execution in mid-instruction. As a result, the user
must execute a NOP (Opcode=FFH) immediately before
the appropriate sleep instruction, such as:
FF
NOP
6F
STOP
FF
NOP
7F
HALT
; clear the pipeline
; enter STOP Mode
or
; clear the pipeline
; enter HALT Mode
34
PRELIMINARY
DS97KEY2005