Z86E04 Datasheet, PDF (23/44 Pages) Zilog, Inc. – CMOS Z8 OTP MICROCONTROLLERS

Zilog
Z86E04/E08
CMOS Z8 OTP Microcontrollers
Comparator Inputs. Two analog comparators are added Mode. The common voltage range is 0–4 V when the V_CC
to input of Port 3, P31, and P32, for interface flexibility. The is 5.0V; the power supply and common mode rejection ra-
comparators reference voltage P33 (REF) is common to tios are 90 dB and 60 dB, respectively.
both comparators.
1
Interrupts are generated on either edge of Comparator 2's
Typical applications for the on-board comparators; Zero output, or on the falling edge of Comparator 1's output.
crossing detection, A/D conversion, voltage scaling, and The comparator output is used for interrupt generation,
threshold detection. In Analog Mode, P33 input functions Port 3 data inputs, or T_IN through P31. Alternatively, the
serve as a reference voltage to the comparators.
comparators can be disabled, freeing the reference input
(P33) for use as IRQ1 and/or P33 input.
The dual comparator (common inverting terminal) features
a single power supply which discontinues power in STOP
FUNCTIONAL DESCRIPTION
The following special functions have been incorporated
into the Z8 devices to enhance the standard Z8 core archi-
tecture to provide the user with increased design flexibility.
RESET. This function is accomplished by means of a Pow-
er-On Reset or a Watch-Dog Timer Reset. Upon power-
up, the Power-On Reset circuit waits for T_POR ms, plus 18
clock cycles, then starts program execution at address
000C (Hex) (Figure 10). The Z8 control registers' reset val-
ue is shown in Table 3.
POR
(Cold Start)
P27
(Stop Mode)
INT OSC
Delay Line
TPOR msec
XTAL OSC
18 CLK
Reset Filiter
Chip Reset
Figure 10. Internal Reset Configuration
Power-On Reset (POR). A timer circuit clocked by a ded-
icated on-board RC oscillator is used for a POR timer func-
tion. The POR time allows V_CC and the oscillator circuit to
stabilize before instruction execution begins. The POR
timer circuit is a one-shot timer triggered by one of the four
following conditions:
s Power-bad to power-good status
s Stop-Mode Recovery
s WDT time-out
s WDH time-out
Watch-Dog Timer Reset. The WDT is a retriggerable
one-shot timer that resets the Z8 if it reaches its terminal
count. The WDT is initially enabled by executing the WDT
instruction and is retriggered on subsequent execution of
the WDT instruction. The timer circuit is driven by an on-
board RC oscillator.
DS97Z8X1104
PRELIMINARY
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