Z86230 Datasheet, PDF (14/61 Pages) Zilog, Inc. – ADVANCED VIOLENCE BLOCKING AND NTSC 21 XDS

PIN DESCRIPTIONS
BLOCK DIAGRAM AND OPERATIONAL OVERVIEW
TABLE 1. PIN DESCRIPTIONS
Symbol Pin #
HIN/XIN 5
Function
Direction Description
Horizontal In/XTAL In Input
When XTAL mode is selected, the horizontal
frequency signal may be generated on the chip
using the external 32.768-kHz crystal circuit, as
shown below. This circuit must be connected
between pin 5 and 3.
V_SS
6
VIDEO 7
CSYNC 8
Power Supply
(digital) GND
Composite Video
Composite Sync
N/A
Input
Output
Z86230
Pin 5
C1
10pF
Y1
32.768KHz
Pin 3
R2
470K
R1
22M
C2
20pF
Crystal Type: 32.768 kHz, CL=12.5pF
Series Resistance < 35 kOhms
(18 kOhms typ)
Epson, C-001R 32.768 kHz or
Fox, NC26, NC28 or equivalent
When HIN mode is selected, a horizontal
frequency signal must be supplied to the pin.
This signal must be within +3% Fh; however,
the frequency signal can exhibit any polarity
and duty cycle. Alternatively, an external
horizontal frequency signal may be used in
XIN mode operation. In this case, the signal
must exhibit a frequency of 32.768 KHz.
This pin is the lowest potential power pin for
the digital circuit that is typically tied to
system ground.
Composite NTSC video input, 1.0V p-p (nom),
band limited to 600 kHz. The circuit operates
with signal variation between 0.7–1.4V p-p.
The polarity is sync tips negative. This signal
pin should be AC-coupled through a 0.1 µF
capacitor and driven by a source impedance
of 470 ohms or less.
Sync slice level. A 0.1 µmF capacitor must be
tied between this pin and analog ground
V_SS(A). This capacitor stores the sync slice
level voltage.
14
Z86230—PRELIMINARY
PS000400-TVC0499