MT90502_06 Datasheet, PDF (141/205 Pages) Zarlink Semiconductor Inc – Multi-Channel AAL2 SAR

MT90502
Data Sheet
Address: 502h
Label: status0
Reset Value: 0000h
Label
cps_packet_refused_error
txsar_wbcache_overflow
txtdm_wcache_overflow
packet_fifo_overflow
misaligned_flag
bad_idle_code
short_packet
dcoffset_overflow
Reserved
Bit Position Type
Description
5
ROL CPS-Packet could not be written because all 512
descriptors for the VC were occupied.
6
ROL The 64 X 21 TX SAR write back cache overflow.
7
ROL The 128 X 72 byte write cache overflow.
8
ROL The 1024 X 41 packet FIFO overflow.
9
ROL HDLC Packet got a misaligned flag (not aligned on a
byte boundary)
10
ROL HDLC Packet got idle code in the middle of a packet!
11
ROL HDLC Packet was too short (0 data bytes!)
12
ROL DC offset value caused a linear value to be calculated
as more than 4096
15:13
ROL Reserved. Always read as “000”
Table 93 - TDM TX Status Register (continued)
141
Zarlink Semiconductor Inc.