DS670 Datasheet, PDF (8/11 Pages) Xilinx, Inc – Low-power CMOS EPROM process

QPRO Family of XC1700E Configuration PROMs
AC Characteristics Over Operating Condition
X-Ref Target - Figure 3
CE
RESET/OE
CLK
DATA
TSCE
TOE
TCE
TLC
THC
TCAC
TSCE
TCYC
THOE
TOH
TDF
THCE
TOH
Figure 3: AC Characteristics Over Operating Condition
DS070_03_111010
Table 8: AC Characteristics Over Operating Condition⁽¹⁾⁽²⁾
Symbol
Description
XC1765E
Min Max
XC17256E
Min Max
T_OE
T_CE
T_CAC
T_OH
T_DF
T_CYC
T_LC
T_HC
T_SCE
T_HCE
T_HOE
OE to data delay
CE to data delay
CLK to data delay
Data hold from CE, OE, or CLK⁽³⁾
CE or OE to data float delay⁽³⁾⁽⁴⁾
Clock periods
CLK Low time⁽³⁾
CLK High time⁽³⁾
CE setup time to CLK (to guarantee proper counting)
CE hold time to CLK (to guarantee proper counting)
OE hold time (guarantees counters are reset)
–
45
–
25
–
60
–
45
–
150
–
50
0
–
0
–
–
50
–
50
200
–
80
–
100
–
20
–
100
–
20
–
25
–
20
–
0
–
0
–
100
–
20
–
Notes:
1. AC test load = 50 pF
2. All AC parameters are measured with V_IL = 0.0V and V_IH = 3.0V.
3. Guaranteed by design, not tested.
4. Float delays are measured with 5 pF AC loads. Transition is measured at ±200 mV from steady state active levels.
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
DS670 (v1.0) December 3, 2010
www.xilinx.com
Product Specification
8