DS670 Datasheet, PDF (2/11 Pages) Xilinx, Inc – Low-power CMOS EPROM process

QPRO Family of XC1700E Configuration PROMs
Pin Description
DATA
Data output, 3-stated when either CE or OE are inactive. During programming, the DATA pin is I/O.
Note: OE can be programmed to be either active High or active Low.
CLK
Each rising edge on the CLK input increments the internal address counter, if both CE and OE are active.
RESET/OE
When High, this input holds the address counter reset and 3-states the DATA output. The polarity of this input pin is
programmable as either RESET/OE or OE/RESET. To avoid confusion, this document describes the pin as RESET/OE,
although the opposite polarity is possible on all devices. When RESET is active, the address counter is held at zero, and the
DATA output is put in a high-impedance state. The polarity of this input is programmable. The default is active High RESET,
but the preferred option is active Low RESET, because it can be driven by the FPGA’s INIT pin.
The polarity of this pin is controlled in the programmer interface. This input pin is easily inverted using the Xilinx HW-130
programmer software. Third-party programmers have different methods to invert this pin.
CE
When High, this pin disables the internal address counter, 3-states the DATA output, and forces the device into low-I_CC
standby mode.
CEO
Chip enable output, to be connected to the CE input of the next PROM in the daisy chain. This output is Low when the CE
and OE inputs are both active AND the internal address counter has been incremented beyond its terminal count (TC) value.
In other words: when the PROM has been read, CEO will follow CE as long as OE is active. When OE goes inactive, CEO
stays High until the PROM is reset.
Note: OE can be programmed to be either active High or active Low.
V_PP
Programming voltage. No overshoot above the specified maximum voltage is permitted on this pin. For normal read
operation, this pin must be connected to V_CC. Failure to do so can lead to unpredictable, temperature-dependent operation
and severe problems. Do not leave V_PP floating!
V_CC and GND
V_CC is positive supply pin and GND is ground pin.
DS670 (v1.0) December 3, 2010
www.xilinx.com
Product Specification
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