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XPLA3 Datasheet, PDF (10/11 Pages) Xilinx, Inc – Excellent pin retention during design changes
R
CoolRunner™ XPLA3 CPLD
Absolute Maximum Ratings(1)
Symbol
Parameter
Min.
Max.
Unit
VCC
Supply voltage(2) relative to GND
VI
Input voltage(3) relative to GND
–0.5
3.6
V
–0.5
5.5
V
IOUT
Output current
–100
100
mA
TJ
Maximum junction temperature
–40
150
°C
TSTR
Storage temperature
–65
150
°C
Notes:
1. Stresses above those listed may cause malfunction or permanent damage to the device. This is a stress rating only. Functional operation
at these or any other condition above those indicated in the operational and programming specification is not implied.
2. The chip supply voltage must rise monotonically.
3. Maximum DC undershoot below GND must be limited to either 0.5V or 10 mA, whichever is easier to achieve. During transitions, the
device pins may undershoot to –2.0V or overshoot to 7.0V, provided this over- or undershoot lasts less than 10 ns and with the forcing
current being limited to 200 mA.
4. External I/O voltage may not be applied for more than 100 milliseconds without the presence of VCC.
Recommended Operation Conditions
Symbol
Parameter
VCC
Supply voltage f
VIL
Low-level input voltage
VIH
High-level input voltage
VO
Output voltage
TR
Input rise time
TF
Input fall time
Test Conditions
Commercial TA = 0°C to 70°C
Industrial TA = –40°C to +85°C
Quality and Reliability Characteristics
Min.
3.0
2.7
0
2.0
0
Max.
3.6
3.6
0.8
5.5
VCC
20
20
Unit
V
V
V
V
V
ns
ns
Symbol
TDR
NPE
VESD
Parameter
Data retention
Program/Erase Cycles (Endurance)
Electrostatic Discharge (ESD)
Device Families
Min
20
1,000
2,000
Max
Units
-
Years
-
Cycles
-
Volts
Parameter
Macrocells
Usable gates
Registers
I/Os
TPD (ns)
TSUF (ns)
TCO (ns)
FSYSTEM (MHz)
XCR3032XL
32
750
32
32
5.0
TBD
4.0
200
XCR3064XL XCR3128XL XCR3256XL
64
128
256
1,500
3,000
6,000
64
128
256
64
104
160
6.0
6.0
7.5
TBD
TBD
2.0
4.0
4.5
4.5
167
167
140
Preliminary Information
XCR3384XL
384
9,000
384
216
7.5
TBD
5.0
TBD
DS012 (v1.1) March 3, 2000
www.xilinx.com
10
1-800-255-7778