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| X40430 Datasheet, PDF (19/24 Pages) Intersil Corporation – Triple Voltage Monitor with Integrated CPU Supervisor | |||
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X40430/X40431 â Preliminary Information
RESET/RESET/MR Timings
VTRIP1
VCC
tPURST
RESET
tR
VRVALID
tRPD1
tPURST
tF
RESET
MR
tMD
tIN1
LOW VOLTAGE AND WATCHDOG TIMINGS PARAMETERS
Symbol
tRPD1
tRPDL
t LR
tRPDX
tPURST
Parameters
VTRIP1 to RESET/RESET (Power down only)
VTRIP1 to LOWLINE
LOWLINE to RESET/RESET delay (Power down only) [= tRPD1-tRPDL]
VTRIP2 to V2FAIL, or VTRIP3 to V3FAIL
Power On Reset delay:
PUP1=0, PUP0=0
PUP1=0, PUP0=1
PUP1=1, PUP0=0
PUP1=1, PUP0=1
Min.
tF
tR
VRVALID
tMD
tin1
tWDO
VCC, V2MON, V3MON, Fall Time
VCC, V2MON, V3MON, Rise Time
Reset Valid VCC
MR to RESET/ RESET delay (activation only)
Pulse width for MR
Watchdog Timer Period:
WD1=0, WD0=0
WD1=0, WD0=1
WD1=1, WD0=0
tRST1
tRST2
tRSP
Watchdog Reset Time Out Delay
WD1=0, WD0=0
WD1=0, WD0=1
Watchdog Reset Time Out Delay WD1=1, WD0=0
Watchdog timer restart pulse width
20
20
1
500
5
100
12.5
1
Typ.
10
500
10
50
200
400
800
1.4
200
25
200
25
Max. Unit
20
µs
ns
20
µs
ms
ms
ms
ms
mV/µs
mV/µs
V
ns
µs
s
ms
ms
300
ms
37.5 ms
µs
REV 1.2.3 11/28/00
www.xicor.com
Characteristics subject to change without notice. 19 of 24
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