X24257 Datasheet, PDF (13/19 Pages) Xicor Inc. – 400kHz 2-Wire Serial EEPROM with Block Lock

X24257 – Preliminary Information
POWER-UP TIMING⁽⁴⁾
Symbol
Parameter
Max.
Unit
t_PUR
Power-up to Read Operation
1
ms
t_PUW
Power-up to Write Operation
5
ms
t Notes: (4) tPUR and tPUW are the delays required from the time VCC is stable until the specified operation can be initiated. These parameters
are periodically sampled and not 100% tested.
(5) Typical values are for T_A = 25°C and nominal supply voltage (5V), Cb = total capacitance of one bus line in pF.
c _{Bus Timing}
u _SCL
od ^{SDA IN}
t_SU:STA
t_F
t_HIGH
t_LOW
t_HD:STA t_HD:DAT
t_SU:DAT
t_R
t _SU:STO
r ^tAA
t_DH
t_BUF
P ^{SDA OUT}
S₀, S₁, S₂, and WP Pin Timing
e _SCL
et _{SDA IN}
ol S₀, S₁, S₂, and WP
Clk 1
Slave Address Byte
Clk 9
t_{SU: S0, S1, S2, WP}
t_{HD: S0, S1, S2, WP}
s _{Write Cycle Limits}
Symbol
b _TWC(6)
Parameter
Write Cycle Time
Min.
—
Typ.
5
Max.
10
Unit
ms
O ^{Notes: (6) tWC is the minimum cycle time to be allowed from the system perspective unless polling techniques are used. It is the maximum}
time the device requires to automatically complete the internal write operation.
The write cycle time is the time from a valid stop condition of a write sequence to the end of the internal erase/write
cycle. During the write cycle, the X24257 bus interface circuits are disabled, SDA is allowed to remain HIGH, and
the device does not respond to its slave address.
REV 1.1.1 10/15/00
www.xicor.com
Characteristics subject to change without notice. 13 of 19