W83697HF_05 Datasheet, PDF (83/102 Pages) Winbond – LPC I/O

W83697HF
= 1 enable the generation of an SMI /PME interrupt due to CIR's IRQ.
Bit 0: MIDIIRQEN.
= 0 disable the generation of an SMI /PME interrupt due to MIDI's IRQ.
= 1 enable the generation of an SMI /PME interrupt due to MIDI's IRQ.
CRF9 (Default 0x00)
Bit 7 - 3: Reserved. Return zero when read.
Bit 2: PME_EN: Select the power management events to be either an PME or SMI interrupt
for the IRQ events. Note that: this bit is valid only when SMIPME_OE = 1.
= 0 the power management events will generate an SMI event.
= 1 the power management events will generate an PME event.
Bit 1: FSLEEP: This bit selects the fast expiry time of individual devices.
=0 1S
= 1 8 mS.
Bit 0: SMIPME_OE: This is the SMI and PME output enable bit.
= 0 neither SMI nor PME will be generated. Only the IRQ status bit is set.
= 1 an SMI or PME event will be generated.
7.14 Logical Device B (Hardware Monitor)
CR30 (Default 0x00)
Bit 7 - 1: Reserved.
Bit 0: = 1 Activates the logical device.
= 0 Logical device is inactive.
CR60, CR 61 (Default 0x00, 0x00)
These two registers select Hardware Monitor base address [0x100:0xFFF] on 8-byte boundary.
CR70 (Default 0x00)
Bit 7 - 4: Reserved.
Bit 3 - 0: These bits select IRQ resource for Hardware Monitor.
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