W83697HF_05 Datasheet, PDF (76/102 Pages) Winbond – LPC I/O

W83697HF
CR70 (Default 0x00)
Bit 7 - 4: Reserved.
Bit [3:0]: These bits select IRQ resource for CIR.
7.10 Logical Device 7 (Game Port GPIO Port 1)
CR30 (Default 0x00)
Bit 7 - 1: Reserved.
Bit 0: = 1 Activate Game Port./GP1
= 0 Game Port/GP1 is inactive.
CR60, CR 61 (Default 0x02, 0x01 if PNPCSV = 0 during POR, default 0x00 otherwise)
These two registers select the Game Port base address [0x100:0xFFF] on 8 byte boundary.
CR62, CR 63 (Default 0x00, 0x00)
These two registers select the GPIO1 base address [0x100:0xFFF] on 1 byte boundary
IO address : CRF1 base address
CRF0 (GP10-GP17 I/O selection register. Default 0xFF)
When set to a '1', respective GPIO port is programmed as an input port.
When set to a '0', respective GPIO port is programmed as an output port.
CRF1 (GP10-GP17 data register. Default 0x00)
If a port is programmed to be an output port, then its respective bit can be read/written
If a port is programmed to be an input port, then its respective bit can only be read.
CRF2 (GP10-GP17 inversion register. Default 0x00)
When set to a '1', the incoming/outgoing port value is inverted.
When set to a '0', the incoming/outgoing port value is the same as in data register.
7.11 Logical Device 8 (MIDI Port and GPIO Port 5)
CR30 (MIDI Port Default 0x00)
Bit 7 - 1: Reserved.
Bit 0: = 1 MIDI/GP5 port is Activate
= 0 MIDI/GP5 port is inactive.
CR60, CR 61 (Default 0x03, 0x30 if PNPCSV = 0 during POR, default 0x00 otherwise)
These two registers select the MIDI Port base address [0x100:0xFFF] on 2byte boundary.
CR62, CR 63 (Default 0x00, 0x00)
These two registers select the GPIO5 base address [0x100:0xFFF] on 4byte boundary.
IO address : CRF1 base address
IO address + 1: CRF3 base address
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Publication Release Date: April 14, 2005
Revision2.0