W83697HF_05 Datasheet, PDF (82/102 Pages) Winbond – LPC I/O

W83697HF
Bit 3 ~ 0: Enable bits of the PME/ SMI generation due to the device's IRQ.
These bits enable the generation of an SMI /PME interrupt due to any IRQ of the devices.
SMI /PME logic output = (PRTIRQEN and PRTIRQSTS) or (FDCIRQEN and FDCIRQSTS) or
(URAIRQEN and URAIRQSTS) or (URBIRQEN and
URBIRQSTS) or
(HMIRQEN and HMIRQSTS) or (WDTIRQEN and WDTIRQSTS) or
(IRQIN3EN and IRQIN3STS) or (IRQIN2EN and IRQIN2STS) or
(IRQIN1EN and IRQIN1STS) or (IRQIN0EN and IRQIN0STS)
Bit 3: PRTIRQEN.
= 0 disable the generation of an SMI /PME interrupt due to printer port's IRQ.
= 1 enable the generation of an SMI /PME interrupt due to printer port's IRQ.
Bit 2: FDCIRQEN.
= 0 disable the generation of an SMI /PME interrupt due to FDC's IRQ.
= 1 enable the generation of an SMI /PME interrupt due to FDC's IRQ.
Bit 1: URAIRQEN.
= 0 disable the generation of an SMI /PME interrupt due to UART A's IRQ.
= 1 enable the generation of an SMI /PME interrupt due to UART A's IRQ.
Bit 0: URBIRQEN.
= 0 disable the generation of an SMI /PME interrupt due to UART B's IRQ.
= 1 enable the generation of an SMI /PME interrupt due to UART B's IRQ.
CRF7 (Default 0x00)
Bit 7 ~ 4: Reserved. Return zero when read.
Bit 3 ~ 0: Enable bits of the SMI /PME generation due to the GPIO IRQ function or device's IRQ.
Bit 3: HMIRQEN.
= 0 disable the generation of an SMI /PME interrupt due to hardware monitor's IRQ.
= 1 enable the generation of an SMI /PME interrupt due to hardware monitor's IRQ.
Bit 2: WDTIRQEN.
= 0 disable the generation of an SMI /PME interrupt due to watch dog timer's IRQ.
= 1 enable the generation of an SMI / SMI interrupt due to watch dog timer's IRQ.
Bit 1: CIRIRQEN.
= 0 disable the generation of an SMI /PME interrupt due to CIR's IRQ.
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Publication Release Date: April 14, 2005
Revision2.0