W963L6ABN Datasheet, PDF (8/30 Pages) Winbond – 512K WORD X 16 BIT LOW POWER PSEUDO SRAM

W963L6ABN
Capacitance
Test conditions: TA = 25°C, f = 1.0 MHz
SYMBOL
DESCRIPTION
CIN1
Address Input Capacitance
CIN2
Control Input Capacitance
CIO
Data Input/Output Capacitance
TEST SETUP
VIN _{= 0V}
VIN _{= 0V}
VIO _{= 0V}
TYP.
-
-
-
MAX.
5
5
8
UNIT
pF
pF
pF
DC Characteristics
(Under Recommended Operating Conditions unless otherwise noted)
notes *1, *2, *3
PARAMETER
SYM.
TEST CONDITIONS
MIN. MAX.
Input Leakage Current
ILI
VIN = VSS to VDD
-1.0 +1.0
Output Leakage Current
ILO _{VOUT =} VSS to VDD, _{Output Disable} -1.0 +1.0
Output High Voltage
Level
Output Low Voltage Level
VOH (27)
VOH (23)
VOL
VDD ₌ VDD (27), _{IOH = -0.5 mA}
VDD ₌ VDD (23), _{IOH = -0.5 mA}
IOL = 1mA
2.2
-
1.8
-
-
0.4
Standby
Current
(TTL)
(CMOS)
Active Current
IDDS
VDD ₌ VDD Max.,
VIN _{= VIH or VIL}
-
3
CE1 = CE2 = VIH
IDDS1
VDD = VDD Max.,
VIN _{≤ 0.2V or} VIN _≥ VDD _-0.2V,
-
70
CE1 = CE2 ≥ VDD -0.2V
IDDA1
VDD = VDD Max.,
VIN = VIH or VIL,
tRC / tWC =
minimum
-
20
IDDA2
CE1= VIL and CE2 =
VIH_, IOUT = 0 mA
tRC / tWC =
1µS
-
3
UNIT
µA
µA
V
V
V
mA
µA
mA
mA
Notes:
*1: All voltages are reference to VSS.
*2: DC Characteristics are measured after following POWER-UP timing.
*3: IOUT depends on the output load conditions.
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