W963L6ABN Datasheet, PDF (6/30 Pages) Winbond – 512K WORD X 16 BIT LOW POWER PSEUDO SRAM

W963L6ABN
7. FUNCTION TRUTH TABLE
MODE
NOTE CE2 _{CE1 WE}
OE
LB
UB
A0-18
DQ1-8 DQ9-16
IDD
DATA
RETENTION
Standby
(Deselect)
Power Down
Program
*1
XXXX
X High-Z High-Z IDDS
Yes
H
X
X
X
X
KEY
*6
High-Z
High-Z
No
Output
Disable
*2
HHXX
*7 High-Z High-Z
No Read
H H Valid High-Z High-Z
HL
Read
*3
H
L
L
*5
Valid
Output
Valid
Output
Valid
IDDA
Yes
Write (Upper Byte)
H
L
Valid Invalid
Input
Valid
Write (Lower Byte)
L
H
L
H
Valid
Input
Valid
Invalid
Write (Word)
L
L
Valid
Input
Valid
Input
Valid
Power Down *4 L X X X X X
X High-Z High-Z IDDP No/Yes
Notes: L = VIL, H = VIH, X can be either VIL or VIH_, High-Z = High impedance, KEY = Key Address.
*1: The Power Down Program can be performed one time after compliance of Power-up timings and it should not be re-
programmed after regular Read or Write.
*2: Output Disable mode should not be kept longer than 1 µS.
*3: Byte control at Read mode is not supported.
*4: Power Down mode can be entered from Standby state and all DQ pins are in High-Z state. IDDP current and data
retention depend on the selection of Power Down Program.
*5: Either or both LB and UB must be Low for Read operation.
*6: See “Power Down Program Key Table” in next page for details.
*7: Can be either VIL or VIH _{but must be valid before Read or Write.}
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