W963L6ABN Datasheet, PDF (5/30 Pages) Winbond – 512K WORD X 16 BIT LOW POWER PSEUDO SRAM

W963L6ABN
6. BLOCK DIAGRAM
VDD
VSS
A0
to
A18
ADDRESS
LATCH &
BUFFER
ROW
DECODER
MEMORY
CELL
ARRAY
33,554,432 bits
DQ1
to
DQ8
DQ9
to
DQ16
INPUT /
OUTPUT
BUFFER
INPUT DATA
LATCH &
CONTROL
SENSE /
SWITCH
COLUMN /
DECODER
OUTPUT
DATA
CONTROL
ADDRESS
LATCH &
BUFFER
CE2
POWER
CONTROL
PE
TIMING
CONTROL
CE1
WE
LB
UB
OE
Publication Release Date: March 11, 2003
-5-
Revision A1