W77C32_07 Datasheet, PDF (70/78 Pages) Winbond – 8-BIT MICROCONTROLLER

W77C32/W77C032A
16.3.3 MOVX Characteristics Using Stretch Memory Cycles
PARAMETER
SYM.
VARIABLE
CLOCK
MIN.
VARIABLE
CLOCK
MAX.
UNITS
STRECH
Data Access ALE Pulse Width
Address Hold After ALE Low for
MOVX Write
t_LLHL2
t_LLAX2
1.5 t_CLCL – 5
2.0 t_CLCL – 5
0.5 t_CLCL – 5
nS
t_MCS = 0
t_MCS > 0
nS
RD Pulse Width
WR Pulse Width
RD Low to Valid Data In
Data Hold after Read
Data Float after Read
ALE Low to Valid Data In
Port 0 Address to Valid Data In
Port 2 Address to Valid Data In
ALE Low to RD or WR Low
Port 0 Address to RD or WR Low
Port 2 Address to RD or WR Low
Data Valid to WR Transition
Data Hold after Write
t_RLRH
2.0 t_CLCL – 5
t_MCS – 10
nS
t_WLWH
2.0 t_CLCL – 5
t_MCS – 10
nS
t_RLDV
2.0 t_CLCL – 20
nS
t_MCS – 20
t_RHDX
0
nS
t_RHDZ
t_CLCL – 5
nS
2.0 t_CLCL – 5
t_LLDV
2.5 t_CLCL – 5
t_MCS +
nS
2t_CLCL – 40
t_AVDV1
3.0 t_CLCL – 20
nS
2.0t_CLCL – 5
t_AVDV2
3.5 t_CLCL – 20
nS
2.5 t_CLCL – 5
t_LLWL
0.5 t_CLCL – 5
1.5 t_CLCL – 5
0.5 t_CLCL + 5
1.5 t_CLCL + 5
nS
t_AVWL
t_CLCL – 5
2.0 t_CLCL – 5
nS
t_AVWL2
1.5 t_CLCL – 5
2.5 t_CLCL – 5
nS
-5
t_QVWX
1.0 t_CLCL – 5
nS
t_WHQX
t_CLCL – 5
2.0 t_CLCL – 5
nS
t_MCS = 0
t_MCS > 0
t_MCS = 0
t_MCS > 0
t_MCS = 0
t_MCS > 0
t_MCS = 0
t_MCS > 0
t_MCS = 0
t_MCS > 0
t_MCS = 0
t_MCS > 0
t_MCS = 0
t_MCS > 0
t_MCS = 0
t_MCS > 0
t_MCS = 0
t_MCS > 0
t_MCS = 0
t_MCS > 0
t_MCS = 0
t_MCS > 0
t_MCS = 0
t_MCS > 0
RD Low to Address Float
t_RLAZ
0.5 t_CLCL – 5
nS
RD or WR High to ALE High
0
10
t_WHLH
1.0 t_CLCL – 5
1.0 t_CLCL + 5
nS
t_MCS = 0
t_MCS > 0
Note: t_MCS is a time period related to the Stretch memory cycle selection. The following table shows the time period of t_MCS for
each selection of the Stretch value.
- 70 -