W77C32_07 Datasheet, PDF(27/78 Page) Winbond

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W77C32_07 Datasheet, PDF (27/78 Pages) Winbond – 8-BIT MICROCONTROLLER

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W77C32/W77C032A

8. INSTRUCTION

The W77C032 executes all the instructions of the standard 8032 family. The operation of these

instructions, their effect on the flag bits and the status bits is exactly the same. However, timing of

these instructions is different. The reason for this is two fold. Firstly, in the W77C032, each machine

cycle consists of 4 clock periods, while in the standard 8032 it consists of 12 clock periods. Also, in the

W77C032 there is only one fetch per machine cycle i.e. 4 clocks per fetch, while in the standard 8032

there can be two fetches per machine cycle, which works out to 6 clocks per fetch.

The advantage the W77C032 has is that since there is only one fetch per machine cycle, the number

of machine cycles in most cases is equal to the number of operands that the instruction has. In case

of jumps and calls there will be an additional cycle that will be needed to calculate the new address.

But overall the W77C032 reduces the number of dummy fetches and wasted cycles, thereby

improving efficiency as compared to the standard 8032.

Table 2. Instructions that affect Flag settings

INSTRUCTION

CARR

OVERFLOW

AUXILIARY

CARRY

INSTRUCTION CARRY OVERFLOW

ADD

ADDC

SUBB

MUL

CLR C

CPL C

ANL C, bit

DIV

DA A

RRC A

RLC A

ORL C, bit

MOV C, bit

CJNE

SETB C

A âXâ indicates that the modification is as per the result of instruction.

AUXILIARY

CARRY

Table 3. Instruction Timing for W77C032

INSTRUCTION

NOP

ADD A, R0

ADD A, R1

ADD A, R2

ADD A, R3

ADD A, R4

ADD A, R5

ADDC A, R1

ADDC A, R2

ADDC A, R3

ADDC A, R4

ADDC A, R5

ADDC A, R6

HEX OP-

CODE

BYTES

W77C032

MACHINE

CYCLES

W77C032

CLOCK

CYCLES

8032

CLOCK

CYCLES

W77C032 VS.

8032 SPEED

RATIO

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Publication Release Date: February 1, 2007

Revision A8

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