W77C32_07 Datasheet, PDF (65/78 Pages) Winbond – 8-BIT MICROCONTROLLER

W77C32/W77C032A
15. TIMED ACCESS PROTECTION
The W77C032 has several new features, like the Watchdog timer, on-chip ROM size adjustment, wait
state control signal and Power on/fail reset flag, which are crucial to proper operation of the system. If
left unprotected, errant code may write to the Watchdog control bits resulting in incorrect operation
and loss of control. In order to prevent this, the W77C032 has a protection scheme which controls the
write access to critical bits. This protection scheme is done using a timed access.
In this method, the bits which are to be protected have a timed write enable window. A write is
successful only if this window is active, otherwise the write will be discarded. This write enable window
is open for 3 machine cycles if certain conditions are met. After 3 machine cycles, this window
automatically closes. The window is opened by writing Aah and immediately 55h to the Timed
Access(TA) SFR. This SFR is located at address C7h. The suggested code for opening the timed
access window is
TA REG 0C7h
MOV TA, #0Aah
MOV TA, #055h
;define new register TA, located at 0C7h
When the software writes Aah to the TA SFR, a counter is started. This counter waits for 3 machine
cycles looking for a write of 55h to TA. If the second write (55h) occurs within 3 machine cycles of the
first write (Aah), then the timed access window is opened. It remains open for 3 machine cycles,
during which the user may write to the protected bits. Once the window closes the procedure must be
repeated to access the other protected bits.
Examples of Timed Assessing are shown below.
Example 1: Valid access
MOV TA, #0Aah 3 M/C
MOV TA, #055h 3 M/C
MOV WDCON, #00h 3 M/C
Example 2: Valid access
MOV TA, #0Aah 3 M/C
MOV TA, #055h 3 M/C
NOP
1 M/C
SETB EWT
2 M/C
Example 3: Invalid access
MOV TA, #0Aah 3 M/C
MOV TA, #055h 3 M/C
NOP
1 M/C
NOP
1 M/C
CLR POR
2 M/C
Note: M/C = Machine Cycles
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Publication Release Date: February 1, 2007
Revision A8