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| W972GG6JB Datasheet, PDF (65/87 Pages) Winbond – 16M 8 BANKS 16 BIT DDR2 SDRAM | |||
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W972GG6JB
DQS
DQS
VDDQ
tDS
tDH
VIH(ac)min
VIH(dc)min DC to VREF
region
VREF(dc)
VIL(dc)max
tangent
line
VIL(ac)max
tDS tDH
nominal
line
tangent
line
nominal
line
DC to VREF
region
VSS
ÎTR
ÎTF
Hold Slew Rate tangent line[VREF(dc) - VIL(ac)max]
Rising Signal =
ÎTR
Hold Slew Rate
Falling Signal
=
tangent
line
[VIH(dc)min
ÎTF
-
VREF(dc)]
Figure 27 â Illustration tangent line for tDH (differential DQS, DQS )
- 65 -
Publication Release Date: Nov. 29, 2011
Revision A02
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