W964B6BBN Datasheet, PDF (6/30 Pages) Winbond – 1M WORD X 16BIT LOW POWER PSEUDO SRAM

W964B6BBN
7. FUNCTION TRUTH TABLE
Mode
Standby
(Deselect)
Output
Disable
Note CE2 _{CE1 WE}
OE
LB
UB ^{A0-18 DQ1-8 DQ9-16}
IDD
Data
Retention
HXXXX
X High-Z High-Z IDDS
Yes
*1
HHXX
*5 High-Z High-Z
No Read
H H Valid High-Z High-Z
HL
Read
*2 H
L *4
Valid
Output
Valid
Output
Valid
L
IDDA
Yes
Write (Upper Byte)
H
L
Valid Invalid
Input
Valid
Write (Lower Byte)
L
H
L
H
Valid
Input
Valid
Invalid
Write (Word)
L
L
Valid
Input
Valid
Input
Valid
Power Down *3 L X X X X X
X High-Z High-Z IDDP No/Yes
Notes: L = VIL, H = VIH, X can be either VIL or VIH_, High-Z = High impedance, KEY = Key Address.
*1: Output Disable mode should not be kept longer than 1 µS.
*2: Byte control at Read mode is not supported.
*3: Power Down mode can be entered from Standby state and all DQ pins are in High-Z state. IDDP current and data
retention depend on the selection of Power Down Program.
*4: Either or both LB and UB must be Low for Read operation.
*5: Can be either VIL or VIH _{but must be valid before Read or Write.}
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