W964B6BBN Datasheet, PDF (18/30 Pages) Winbond – 1M WORD X 16BIT LOW POWER PSEUDO SRAM

W964B6BBN
Timing Waveforms, Continued
Read Timing #4 (Address Access after CE1 Control Access)
ADDRESS
CE1
OE
LB / UB
DQ
(Output)
tRC
ADDRESS VALID
tASC
tCLAH
tAX
tCE
tBSC
tCLZ
tOH
tRC
ADDRESS VALID
tAA
tCHAH
tCHZ
tCHBH
tOH
VALID DATA OUTPUT
VALID DATA OUTPUT
Note: CE2, PE and WE must be High for entire read cycle.
Either or both LB and UB must be Low when both CE1 and OE are Low.
- 18 -