W741E260 Datasheet, PDF (54/94 Pages) Winbond – 4-BIT FLASH MICROCONTROLLER

W741E260
Instruction Set Table 2, continued
CLR DIVR0
Reset the last 4 bits of the DIVideR 0
Machine Code:
Machine Cycle:
Operation:
Description:
CLR DIVR1
00010111
1
00000000
Reset the last 4 bits of the divider 0
When this instruction is executed, the last 4 bits of the divider 0 (14 bits) are
reset.
Reset the last 4 bits of the DIVideR 1
Machine Code:
Machine Cycle:
Operation:
Description:
01010101
10000000
1
Reset the last 4 bits of the divider 1
When this instruction is executed, the last 4 bits of the divider 1 (14 bits) are
reset. This instruction is available in W741C260 body, but it is inhibited in
W741C250 body.
CLR PMF, #I
Clear ParaMeter Flag
Machine Code:
Machine Cycle:
Operation:
Description:
00010110
1 0 0 0 I3 I2 I1 I0
1
Clear Parameter Flag
Description of each flag:
I0, I1, I2 : Reserved
I3 = 1 : The input clock of the watchdog timer is Fosc/1024.
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