W741E260 Datasheet, PDF (26/94 Pages) Winbond – 4-BIT FLASH MICROCONTROLLER

W741E260
Event Flag (EVF)
The event flag is organized as a 8-bit binary register (EVF.0 to EVF.7). It is set by hardware and reset
by CLR EVF, #I instruction or the occurrence of an interrupt. The bit descriptions are as follows:
76543210
EVF R
R
RRR
Note: R means read only.
EVF.0 = 1 Overflow from divider 0 occurred.
EVF.1 = 1 Underflow from timer 0 occurred.
EVF.2 = 1 Signal change at port RC occurred.
EVF.3 is reserved.
EVF.4 = 1 Overflow from divider 1 occurred for W741C260 body.
Falling edge signal at the INT pin occurred for W741C250 body.
EVF.5 & EVF.6 are reserved.
EVF.7 = 1 Underflow from Timer 1 occurred.
Reset Function
The W741E260 is reset either by a power-on reset or by using the external RES pin. The initial state
of the W741E260 after the reset function is executed is described below.
Program Counter (PC)
TM0, TM1
MR0, MR1, PAGE registers
PSR0 registers
IEF, HEF, HCF, PEF, EVF, SEF flags
SCR register
Timer 0 input clock
Timer 1 input clock
MFP output
Input/output ports RA, RB
Output port RE
RA & RB ports output type
RC & RD ports pull-high resistors
Input clock of the watchdog timer
LCD display
Segment output mode
000H
Reset
Reset
Reset
Reset
Reset
FOSC/4
FOSC
Low
Input mode
High
CMOS type
Disable
FOSC/1024
OFF
LCD drive output
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