W925E625 Datasheet, PDF (51/75 Pages) Winbond – 8-bit CID MICROCONTROLLER

W925E/C625
6.15 LCD
1792 dots: 56 Segments x 32 Common, 1/5 bias
An internal voltage pump is enable/disable by option code. The LCD on/off is controlled by bit LCDON
(SCON1.6). If the voltage pump is enable, when LCDON is high to pump voltage and the LCD
waveform is output to LCD pins according the LCD memory, when LCDON is low to turn off the
voltage pump. The voltage of internal regulator is the base voltage of the voltage pump which 5 times
of the base voltage. The output voltage of the regulator is tunable by 4 bits in regulator voltage control
register (REGVC). When REGVC is equal to 0AH, the output voltage is 1.0V. The higher value of
REGVC the lower voltage output of regulator. The adjustable voltage range is about from 0.72V to
1.48V . Accordingly, the LCD contrast is controlled by the value of REGVC. The variation of the
voltage depends on the V_DD. Following is the table of REGVC vs. regulator voltage.
Regvc 00 01 02 03 04 05 06 07 08 09 0ah 0bh 0ch 0dh 0eh 0fh
No
1.497 1.4464 1.3941 1.3426 1.2899 1.238 1.186 1.1352 1.081 1.029 0.976 0.924 0.869 0.815 0.762 0.7112
Loading(3V)
No
1.500 1.449 1.397 1.345 1.292 1.241 1.188 1.137 1.083 1.031 0.978 0.925 0.87 0.816 0.763 0.712
Loading(5V)
With LCD
1.46 1.41 1.36 1.31 1.26 1.21 1.16 1.11 1.05 1 0.95 0.9 0.85 0.80 0.75 0.71
Loading(3v)
With LCD
1.484 1.433 1.381 1.330 1.278 1.227 1.176 1.125 1.072 1.024 0.975 0.926 0.874 0.825 0.773 0.723
Loading(5v)
LCD Frequency
The alternating frequency of the LCD can be set as 16Hz, 32Hz, 64Hz and 128Hz that are determined
by 2 bits of option code. Structure of the LCD alternating frequency (F_LCD) is shown in Figure 6-14.
32K
Sub-oscillator clock
Q1 Q2 Q3 Q4
16K 8K 4K 2K
00
01 M
10 ^u
11 ^x
2 bits of
option code
LCD COM
Waveform
Generator
F LCD
Figure 6-14 LCD alternating frequency (FLCD) circuit diagram
Fw = 32.768 KHz, the LCD frequency is shown in the table below.
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Publication Release Date: July 4, 2005
Revision A10