W925E625 Datasheet, PDF (30/75 Pages) Winbond – 8-bit CID MICROCONTROLLER

W925E/C625
WATCHDOG CONTROL
(initial: note)
Bit:
7
-
6
5
4
3
2
1
0
POR
-
WFS WDIF WTRF EWT RWT
Mnemonic: WDCON
Address: D8h
POR: Power-on reset flag. Hardware will set this flag when system is powered on and this flag is
cleared only by software.
WFS: Watchdog Timer Frequency Select. Set to select F_S as WDT clock input. Clear to select F_OSC as
WDT clock input.
WDIF: Watchdog Timer Interrupt flag. This bit is set whenever the time-out occurs in the watchdog
timer. If the Watchdog interrupt is enabled (EIE.5), then an interrupt will occur (if the global
interrupt enable is set and other interrupt requirements are met). Software or any reset can
clear this bit.
WTRF: Watchdog Timer Reset Flag. Hardware will set this bit when the watchdog timer causes a
reset. Software can read it but must clear it manually. A power-fail reset will also clear the bit.
This bit helps software in determining the cause of a reset. If EWT = 0, the watchdog timer
will have no effect on this bit.
EWT: Enable Watchdog timer Reset. Setting this bit will enable the Watchdog timer Reset function.
RWT: Reset Watchdog Timer. This bit helps in putting the watchdog timer into a known state. It also
helps in resetting the watchdog timer before a time-out occurs. Failing to set the EWT before
time-out will cause an interrupt, if EWDI (EIE.5) is set, and 512 clocks after that a watchdog
timer reset will be generated if EWT is set. This bit is self-clearing by hardware.
Note: The WDCON SFR is set to a 0x000xx0b on an external reset. WTRF is set to a 1 on a Watchdog timer reset, but to a 0
on power on/down resets. WTRF is not altered by an external reset. POR is set to 1 by a power-on reset. EWT is set to 0 on a
Power-on reset and unaffected by other resets.
ACCUMULATOR
(initial=00H)
Bit:
7
6
5
4
3
2
1
0
ACC.7 ACC.6 ACC.5 ACC.4 ACC.3 ACC.2 ACC.1 ACC.0
Mnemonic: ACC
Address: E0h
ACC.7-0: The ACC register.
EXTENDED INTERRUPT ENABLE
(initial=00H)
Bit:
7
-
6
5
4
3
2
1
0
-
EWDI ECOMP EDIV ECID EX3 EX2
Mnemonic: EIE
EIE.7-6:Reserved bits.
EWDI: Enable Watchdog timer interrupt.
ECOMP: Enable comparator interrupt.
EDIV: Enable Divider interrupt.
ECID: Enable CID interrupt.
Address: E8h
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