W925E625 Datasheet, PDF (28/75 Pages) Winbond – 8-bit CID MICROCONTROLLER

W925E/C625
STATUS REGISTER
(initial=00H)
Bit:
7
6
5
4
3
2
1
0
X2UP
HIP
LIP
X1UP
-
-
-
-
Mnemonic: STATUS
Address: C5h
X2UP:Sub-crystal oscillator warm-up status. When set, this bit indicates the crystal oscillator has
completed the warm-up delay. When X2OFF bit is set, hardware will clear this bit. There are two
options which are selected by option code for warm-up delay, one is 1024 clocks warm-up
delay, other is 65536 clocks warm-up delay.
HIP: High Priority Interrupt Status. When set, it indicates that software is servicing a high priority
interrupt. This bit will be cleared when the program executes the corresponding RETI instruction.
LIP: Low Priority Interrupt Status. When set, it indicates that software is servicing a low priority
interrupt. This bit will be cleared when the program executes the corresponding RETI instruction.
X1UP:Crystal Oscillator Warm-up Status. When set, this bit indicates the crystal oscillator has
completed the 65536 clocks warm-up delay. Each time the crystal oscillator is restarted by exit
from power down mode or the X1OFF bit is set, hardware will clear this bit. This bit is set to 1
after a power-on reset. When this bit is cleared, it prevents software from setting the XT/RG bit
to enable CPU operation from crystal oscillator. There are two options which is selected by
option code for warm-up delay, one is 4096 clocks warm-up delay, other is 65536 clocks warm-
up delay.
※Please insert at least 10 instructions NOP after X2UP = ”1”, then switch Fsys = Fs
(CKCON1.0 = “1”, M/S) & disable X1 OSC (PMR.3 = “1”, X1OFF).
FSK TRANSIMT CONTROL REGISTER
Bit:
7
6
5
4
FTE FTM FDS
-
Mnemonic: FSKTC
FTE: FSK transmit Enable; Enable:1, Disable=0
FTM: FSK signal Standard; Bellcore:1, V.23=0
FDS: FSK data sending status
LO0, LO1: FSK transmit level option
FSK output level
LO1
LO0
150Mv
0
0
120Mv
0
1
95Mv
1
0
75Mv
1
1
(initial=00H)
3
2
1
0
-
-
LO1 LO0
Address: C6h
- 28 -