W925E625 Datasheet, PDF (31/75 Pages) Winbond – 8-bit CID MICROCONTROLLER

W925E/C625
EX3: Enable External Interrupt 3.
EX2: Enable External Interrupt 2.
B REGISTER
(initial=00H)
Bit:
7
6
5
4
3
2
1
0
B.7
B.6
B.5
B.4
B.3
B.2
B.1
B.0
Mnemonic: B
Address: F0h
B.7-0:The B register serves as a second accumulator.
EXTENDED INTERRUPT PRIORITY
(initial=00H)
Bit:
7
-
6
5
4
3
2
1
0
-
PWDI PCOMP PDIV PCID PX3 PX2
Mnemonic: EIP
Address: F8h
PWDI: Watchdog timer interrupt priority. 0 = Low priority, 1 = High priority.
PCOMP: Comparator interrupt priority. 0 = Low priority, 1 = High priority.
PDIV: Divider Interrupt Priority. 0 = Low priority, 1 = High priority.
PCID: CID Interrupt Priority. 0 = Low priority, 1 = High priority.
PX3: External Interrupt 3 Priority. 0 = Low priority, 1 = High priority.
PX2: External Interrupt 2 Priority. 0 = Low priority, 1 = High priority.
CID GAIN CONTROL DATA
(initial=00H)
Bit:
7
6
5
4
3
2
1
0
BIT7 BIT6 BIT5 BIT4 BIT3 BIT2 BIT1 BIT0
Mnemonic: CIDGD
Address: F9h
CIDGD.7-0: The data value of programmable CID input filter gain and hysteresis.
CID GAIN CONTROL ADDRESS
(initial=00H)
Bit:
7
6
5
4
3
2
1
0
-
-
-
-
BIT3 BIT2 BIT1 BIT0
Mnemonic: CIDGA
Address: Fah
CIDGA.3: The CIDGD latch control signal. Rising high pulse to latch CIDGD into CID gain control
register.
CIDGA.2-0: The address to indicate CID input gain control registers.
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Publication Release Date: July 4, 2005
Revision A10