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ISD5216 Datasheet, PDF (50/75 Pages) Winbond – 8 to 16 minutes voice record/playback device with integrated codec
ISD5216
7.10.12. Memo and Call Playback
This mode sets the chip up for local playback of recorded messages. The playback path is from the
MULTILEVEL STORAGE ARRAY to the FILTER MUX, then to the LOW PASS FILTER stage. From
there, the audio path goes through the SUM2 SUMMING amplifier to the VOLUME MUX, through the
VOLUME CONTROL then to the SPEAKER output stage. We will assume that we are driving a piezo
speaker element and that this audio was recorded at 8 kHz. All unnecessary stages will be powered
down.
1. Select the MULTILEVEL STORAGE ARRAY path through the FILTER MUX—Bit FLS0, the
state of the FILTER MUX. This is bit D4 of CFG1 and must be set to ONE
2. Power up the LOW PASS FILTER—Bit FLPD controls the power up state of the LOW PASS
FILTER stage. This is bit D1 of CFG1 and it must be set to ZERO.
3. Select the 8.0 kHz sample rate—Bits FLD0 and FLD1 select the Low Pass filter setting and
sample rate to be used during record and playback. These are bits D2 and D3 of CFG1. To
enable 8.0 kHz sample rate, D2 and D3 must be set to ZERO.
4. Select the LOW PASS FILTER input (only) to the S2 SUMMING amplifier —Bits S2M0 and
S2M1 control the state of the SUM2 SUMMING amplifier. These are bits D5 and D6, respectively,
of CFG1. Set D5 to ZERO and D6 to ONE to select the LOW PASS FILTER (only) path.
5. Select the SUM2 SUMMING amplifier path through the VOLUME MUX—Bits VLS0 and VLS1
control the VOLUME MUX stage. These bits are D14 and D15, respectively, of CFG1. Set D14 to
ONE and D15 to ZERO to select the SUM2 SUMMING amplifier.
6. Power up the VOLUME CONTROL LEVEL—Bit VLPD controls the power-up state of the
VOLUME CONTROL attenuator. This is Bit D0 of CFG0. Set this bit to a ZERO.
7. Select a VOLUME CONTROL LEVEL—Bits VOL0, VOL1 and VOL2 control the state of the VOL-
UME CONTROL LEVEL. These are bits D11, D12, and D13, respectively, of CFG1. A binary
count of 000 through 111 controls the amount of attenuation through that stage. To set an
attenuation of –12 dB, D11 should be set to ONE, D12 should be set to ONE, and D13 should be
set to a ZERO.
8. Select the VOLUME CONTROL path through the OUTPUT MUX—These are bits D3 and D4,
respectively, of CFG0. Set D3 to ZERO and D4 is a ZERO to select the VOLUME CONTROL.
9. Power up the SPEAKER amplifier and select the HIGH GAIN mode—Bits OPA0 and OPA1
control the state of the speaker (SP+ and SP–) and AUX OUT outputs. These are bits D1 and D2
of CFG0. Set D1 to ONE and D2 to ZERO to power-up the speaker outputs in the HIGH GAIN
mode and to power-down the AUX OUT.
10. Power up the Internal Oscillator—Bit OSPD controls the power up state of the Internal
Oscillator. This is bit D8 of CFG0 and it must be set to ZERO to power up the Internal Oscillator.
To set up the chip for Memo or Call Playback, the configuration registers are set up as follows:
CFG0 = 0010 0100 0010 0010 (hex 2422).
CFG1 = 0101 1001 1101 0001 (hex 59D1).
CFG2 = 0000 0000 0000 0011 (hex 0003).
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