ISD5216 Datasheet, PDF (44/75 Pages) Winbond – 8 to 16 minutes voice record/playback device with integrated codec

ISD5216
7.10.6. Digital Erase
1. Host executes I²C START.
2. Send Slave Address with /W bit = “0” (Write).
3. Send Digital Erase command (d1h)
4. Send high address byte (00h)
5. Send low address byte (a0h) - erase row 5 in this example. Erase operations must be
addressed on a page boundary. The 5 LSB bits of the Low Address Byte will be
ignored.
6. Host executes I²C STOP.
7. Wait until the desired number of pages have been erased. There will be a pulse on the RAC
pin for each page that is erased. After the stop command (described below) has been
received, erasing will stop at the end of the page currently being erased. To erase one page
only, issue the stop command immediately after the start erase command.
8. Host executes I²C START.
9. Send Slave Address with /W bit = “0” (Write).
10. Send the Stop command (c0h).
11. Host executes I²C STOP
Erase starts on falling
edge of Slave
acknowledge
S SLAVE ADDRESS W A D1h A DATA A DATA A P Note 2
Command Byte _{High Addr. Byte} Low Addr. Byte
"N" RAC cycles Last erased row ^{S SLAVE ADDRESS} W A ^80h
Note 3.
Note 4.
AP
Command Byte
Notes:
1. I²C bus is released while erase proceeds. Other devices may use the bus until it is
time to execute the STOP command that causes the end of the Erase operation.
2. Host processor must count RAC cycles to determine where the chip is in the erase
process, one row per RAC cycle. RAC pulses LOW for 0.25 microsecond at the end of
each erased row. The erase of the “next” row begins with the rising edge of RAC.
See the Digital Erase RAC timing diagram on page 46.
3. 4.When the erase of the last desired row begins, the following STOP command
(Command Byte = 80 hex) must be issued. This command must be completely given,
including receiving the ACK from the Slave before the RAC pin goes HIGH .25
microseconds before the end of the row.
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